On 10/5/26 6:09 PM, Alex Elder wrote:
The clock controller within the TC9564 SoC is accessed via a PCI
endpoint bus through BAR 4 of the first embedded PCIe function.
A syscon node is created to provide access to a range of memory
that is used by the clock controller and shared with other devices.
Co-developed-by: Daniel Thompson <[email protected]>
Signed-off-by: Daniel Thompson <[email protected]>
Signed-off-by: Alex Elder <[email protected]>
---
v2: - Moved the clock devicetree node to be a peer (rather than a child) of
the syscon node
Whoops. I dropped the "reg" property, and that means
the change mentioned above leads to a warning.
Either make them peers, but keep the clock node "reg"
property, or drop "reg" and make the clock node
subordinate to the syscon.
I will address this in version 3 of this series, but
(unless someone suggests otherwise) I'll wait to get
feedback on the rest of the series before I send that.
-Alex
arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
index 0e3bbdaf4661f..06246d185b50f 100644
--- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
+++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
@@ -9,6 +9,7 @@
#define PM7250B_SID 8
#define PM7250B_SID1 9
+#include <dt-bindings/clock/toshiba,tc9564.h>
#include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
#include <dt-bindings/iio/qcom,spmi-adc7-pm7325.h>
#include <dt-bindings/leds/common.h>
@@ -961,7 +962,7 @@ dev@0,0 {
#size-cells = <2>;
ranges; /* This will be updated dynamically */
- pci-ep-bus@4 {
+ pcie_s1b5d0f0_bar4_bus: pci-ep-bus@4 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
@@ -989,6 +990,19 @@ pci-ep-bus@4 {
};
};
+&pcie_s1b5d0f0_bar4_bus {
+ tc9564_config_syscon0: syscon@0 {
+ compatible = "syscon";
+ reg = <0x0 0x2000>;
+ };
+
+ tc9564_clock0: clock {
+ compatible = "toshiba,tc9564-clock";
+ toshiba,config-syscon = <&tc9564_config_syscon0>;
+ #clock-cells = <1>;
+ };
+};
+
&pm7325_gpios {
kypd_vol_up_n: kypd-vol-up-n-state {
pins = "gpio6";
