On Mon, Oct 05, 2026 at 06:09:24PM -0500, Alex Elder wrote: > Define the binding for the clock controller functionality present in > the Toshiba TC9564 SoC. > > Co-developed-by: Daniel Thompson <[email protected]> > Signed-off-by: Daniel Thompson <[email protected]> > Signed-off-by: Alex Elder <[email protected]> > --- > v2: - Only define clock information, not reset information > - Reworded description to avoid talking about software > - Clock IDs are now consecutive (no more commented-out values) > > .../bindings/clock/toshiba,tc9564-clock.yaml | 54 +++++++++++++++++++ > MAINTAINERS | 7 +++ > include/dt-bindings/clock/toshiba,tc9564.h | 34 ++++++++++++ > 3 files changed, 95 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/clock/toshiba,tc9564-clock.yaml > create mode 100644 include/dt-bindings/clock/toshiba,tc9564.h > > diff --git > a/Documentation/devicetree/bindings/clock/toshiba,tc9564-clock.yaml > b/Documentation/devicetree/bindings/clock/toshiba,tc9564-clock.yaml > new file mode 100644 > index 0000000000000..329b8f002cf2d > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/toshiba,tc9564-clock.yaml > @@ -0,0 +1,54 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/toshiba,tc9564-clock.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Toshiba TC9564 Clock Controller > + > +maintainers: > + - Alex Elder <[email protected]> > + - Daniel Thompson <[email protected]> > + > +description: > + The Toshiba TC9564 is an SoC accessed by a host system through the > + upstream PCIe port on the PCIe switch it implements. The switch > + includes an embedded PCIe endpoint that provides access to various > + SoC peripherals (including a clock controller) via its BARs. > + > + A total of 21 clocks are implemented, though two of these are not > + controllable. Access to the clock controller relies on PCIe being > + functional, so the PCIe clock is assumed to be always on. Similarly, > + the PCIe controller relies on I2C, so the I2C clock is also assumed > + to be always on. > + > + Clock ids are defined in <dt-bindings/clock/toshiba,tc9564.h>. > + > +properties: > + compatible: > + const: toshiba,tc9564-clock > + > + toshiba,config-syscon: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: > + Phandle for the configuration space system controller.
I do not see my previous comment addressed - you have no resources here, so this belongs to the parent. You responded something about pci-ep, but the parent is not pci-ep. Open your code: https://lore.kernel.org/lkml/[email protected]/ I clearly see code like: syscon { clock@ { }; }; so I do not understand what pci-ep has anything to do here. What's more, I still do not see any usage of these clocks outside. And I still did not receive actual answers (or I missed them) how these clocks are routed OUTSIDE of the connector. You said for example: "Ultimately the TC9564 SoC has a single 25 MHz input clock," but that is input. I did not ask how this device receives clocks. I asked how the host receives the clocks from this device. > + > + "#clock-cells": > + const: 1 > + > +required: > + - compatible > + - toshiba,config-syscon > + - "#clock-cells" > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/toshiba,tc9564.h> Looks unused. > + > + clock { Anyway, if this stays, that's a clock-controller. Best regards, Krzysztof
