On Fri, 2014-05-02 at 17:04 +0200, Denys Vlasenko wrote:
> On 05/02/2014 02:48 AM, Jim Keniston wrote:
> > On Thu, 2014-05-01 at 19:09 +0200, Denys Vlasenko wrote:
> >> +#define VEX2_VVVV(insn) X86_VEX_V((insn)->vex_prefix.bytes[1])
> >> +#define VEX3_VVVV(insn) X86_VEX_V((insn)->vex_prefix.bytes[2])
> >
> > I disclaim any knowledge about VEX* stuff.
> ...
> > skipped this next part...
> >
> >> + /* Similar treatment for VEX3 prefix */
> >> + /* TODO: add XOP/EVEX treatment when insn decoder supports them */
> >> + if (insn->vex_prefix.nbytes == 3) {
> >> + /*
> >> + * vex2: c5 rvvvvLpp (has no b bit)
> >> + * vex3/xop: c4/8f rxbmmmmm wvvvvLpp
> >> + * evex: 62 rxbR00mm.wvvvv1pp.zllBVaaa
> >> + * (evex will need setting of both b and x since
> >> + * in non-sib encoding evex.x is 4th bit of MODRM.rm)
> >> + * Setting VEX3.b (setting because it has inverted meaning):
> >> + */
> >> + cursor = auprobe->insn + insn_offset_vex_prefix(insn) + 1;
> >> + *cursor |= 0x20;
> >> }
> >
> > ... resumed reviewing here.
>
> I do realize that most people reading this code won't be
> aficionados of memorizing x86 insn encoding quirks.
>
> To help them, I added the comment which spells out bit layout
> of vex/evex/xop prefixes (see above). Does it help?
>
...
Well, yes. I read your comments in conjunction with the "VEX Prefix"
wikipedia page and figured out what you're doing, and it looks right. I
would definitely leave the comments in; otherwise there's a chance that
even you won't remember all this stuff 6 months from now.
Jim
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