From: Ian Munsie <imun...@au1.ibm.com>

Some of the MSI IRQ code in pnv_pci_ioda_msi_setup() is generically useful so
split it out.

This will be used by some of the cxl PCIe code later.

Signed-off-by: Ian Munsie <imun...@au1.ibm.com>
Signed-off-by: Michael Neuling <mi...@neuling.org>
---
 arch/powerpc/platforms/powernv/pci-ioda.c | 43 ++++++++++++++++++-------------
 1 file changed, 25 insertions(+), 18 deletions(-)

diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c 
b/arch/powerpc/platforms/powernv/pci-ioda.c
index df241b1..329164f 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -1306,14 +1306,36 @@ static void pnv_ioda2_msi_eoi(struct irq_data *d)
        icp_native_eoi(d);
 }
 
+
+static void set_msi_irq_chip(struct pnv_phb *phb, unsigned int virq)
+{
+       struct irq_data *idata;
+       struct irq_chip *ichip;
+
+       if (phb->type != PNV_PHB_IODA2)
+               return;
+
+       /*
+        * Change the IRQ chip for the MSI interrupts on PHB3.
+        * The corresponding IRQ chip should be populated for
+        * the first time.
+        */
+       if (!phb->ioda.irq_chip_init) {
+               idata = irq_get_irq_data(virq);
+               ichip = irq_data_get_irq_chip(idata);
+               phb->ioda.irq_chip_init = 1;
+               phb->ioda.irq_chip = *ichip;
+               phb->ioda.irq_chip.irq_eoi = pnv_ioda2_msi_eoi;
+       }
+       irq_set_chip(virq, &phb->ioda.irq_chip);
+}
+
 static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb, struct pci_dev *dev,
                                  unsigned int hwirq, unsigned int virq,
                                  unsigned int is_64, struct msi_msg *msg)
 {
        struct pnv_ioda_pe *pe = pnv_ioda_get_pe(dev);
        struct pci_dn *pdn = pci_get_pdn(dev);
-       struct irq_data *idata;
-       struct irq_chip *ichip;
        unsigned int xive_num = hwirq - phb->msi_base;
        __be32 data;
        int rc;
@@ -1365,22 +1387,7 @@ static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb, 
struct pci_dev *dev,
        }
        msg->data = be32_to_cpu(data);
 
-       /*
-        * Change the IRQ chip for the MSI interrupts on PHB3.
-        * The corresponding IRQ chip should be populated for
-        * the first time.
-        */
-       if (phb->type == PNV_PHB_IODA2) {
-               if (!phb->ioda.irq_chip_init) {
-                       idata = irq_get_irq_data(virq);
-                       ichip = irq_data_get_irq_chip(idata);
-                       phb->ioda.irq_chip_init = 1;
-                       phb->ioda.irq_chip = *ichip;
-                       phb->ioda.irq_chip.irq_eoi = pnv_ioda2_msi_eoi;
-               }
-
-               irq_set_chip(virq, &phb->ioda.irq_chip);
-       }
+       set_msi_irq_chip(phb, virq);
 
        pr_devel("%s: %s-bit MSI on hwirq %x (xive #%d),"
                 " address=%x_%08x data=%x PE# %d\n",
-- 
1.9.1

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