On Thu, 2014-10-02 at 11:57 +1000, Michael Ellerman wrote:
> On Tue, 2014-30-09 at 10:34:55 UTC, Michael Neuling wrote:
> > From: Ian Munsie <imun...@au1.ibm.com>
> > 
> > Some of the MSI IRQ code in pnv_pci_ioda_msi_setup() is generically useful 
> > so
> > split it out.
> > 
> > This will be used by some of the cxl PCIe code later.
> > 
> > diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c 
> > b/arch/powerpc/platforms/powernv/pci-ioda.c
> > index df241b1..329164f 100644
> > --- a/arch/powerpc/platforms/powernv/pci-ioda.c
> > +++ b/arch/powerpc/platforms/powernv/pci-ioda.c
> > @@ -1306,14 +1306,36 @@ static void pnv_ioda2_msi_eoi(struct irq_data *d)
> >     icp_native_eoi(d);
> >  }
> >  
> > +
> > +static void set_msi_irq_chip(struct pnv_phb *phb, unsigned int virq)
> > +{
> > +   struct irq_data *idata;
> > +   struct irq_chip *ichip;
> > +
> > +   if (phb->type != PNV_PHB_IODA2)
> > +           return;
> > +
> > +   /*
> > +    * Change the IRQ chip for the MSI interrupts on PHB3.
> > +    * The corresponding IRQ chip should be populated for
> > +    * the first time.
> 
> Seeing as you're moving this comment can you clarify the wording.

Ok.

Mikey
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