Set the input clocks to the highest supported speeds.
Signed-off-by: Ben Hutchings <ben.hutchi...@codethink.co.uk>
---
arch/arm/boot/dts/r8a7790-lager.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts
b/arch/arm/boot/dts/r8a7790-lager.dts
index aaa4f258e279..5f68e53c58ae 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -488,6 +488,9 @@
pinctrl-0 = <&sdhi0_pins>;
pinctrl-names = "default";
+ assigned-clocks = <&mstp3_clks R8A7790_CLK_SDHI0>;
+ assigned-clock-rates = <156000000>;
+
vmmc-supply = <&vcc_sdhi0>;
vqmmc-supply = <&vccq_sdhi0>;
cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
@@ -498,6 +501,9 @@
pinctrl-0 = <&sdhi2_pins>;
pinctrl-names = "default";
+ assigned-clocks = <&mstp3_clks R8A7790_CLK_SDHI2>;
+ assigned-clock-rates = <97500000>;
+
vmmc-supply = <&vcc_sdhi2>;
vqmmc-supply = <&vccq_sdhi2>;
cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
--
2.1.4
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