Hi Ben > > Can you show us more detail ? > > It seems bug... > > The requested clock rate can be up to 52 MHz and the divider can be up > to 1024. With div == 1024 and clk == 52000000, clk * div overflows.
IMO, In such case, driver should find (input) 52 MHz / (divide) 1 = (request) 52 MHz or similar. 52 GHz / 1024 = 52 MHz can be possible (from HW point), but... -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
