This reverts commit 7c4285471c03f9d873421598e2878a99c41def9f.
The clock driver clk-imx8qxp-lpcg still uses LPCG bit-offset instead of
clock-indices for clock-controller dts properties, so it can not switch
to use lpcg indices.
Signed-off-by: Xulin Sun <xulin....@windriver.com>
---
arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
index 4a0deb184657..496501086584 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
@@ -360,8 +360,8 @@ adc0: adc@5a880000 {
reg = <0x5a880000 0x10000>;
interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
- clocks = <&adc0_lpcg IMX_LPCG_CLK_0>,
- <&adc0_lpcg IMX_LPCG_CLK_4>;
+ clocks = <&adc0_lpcg 0>,
+ <&adc0_lpcg 1>;
clock-names = "per", "ipg";
assigned-clocks = <&clk IMX_SC_R_ADC_0 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <24000000>;
@@ -375,8 +375,8 @@ adc1: adc@5a890000 {
reg = <0x5a890000 0x10000>;
interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
- clocks = <&adc1_lpcg IMX_LPCG_CLK_0>,
- <&adc1_lpcg IMX_LPCG_CLK_4>;
+ clocks = <&adc1_lpcg 0>,
+ <&adc1_lpcg 1>;
clock-names = "per", "ipg";
assigned-clocks = <&clk IMX_SC_R_ADC_1 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <24000000>;
--
2.34.1
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