This reverts commit 19a8492473b0afe7340fcf6b764d1c22b8f21ae3.

The clock driver clk-imx8qxp-lpcg still uses LPCG bit-offset instead of
clock-indices for clock-controller dts properties, so it can not switch
to use lpcg indices.

Signed-off-by: Xulin Sun <xulin....@windriver.com>
---
 arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi 
b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
index 496501086584..0ae1a8123c63 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
@@ -389,8 +389,8 @@ flexcan1: can@5a8d0000 {
                reg = <0x5a8d0000 0x10000>;
                interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-parent = <&gic>;
-               clocks = <&can0_lpcg IMX_LPCG_CLK_4>,
-                        <&can0_lpcg IMX_LPCG_CLK_0>;
+               clocks = <&can0_lpcg 1>,
+                        <&can0_lpcg 0>;
                clock-names = "ipg", "per";
                assigned-clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>;
                assigned-clock-rates = <40000000>;
@@ -410,8 +410,8 @@ flexcan2: can@5a8e0000 {
                 * CAN1 shares CAN0's clock and to enable CAN0's clock it
                 * has to be powered on.
                 */
-               clocks = <&can0_lpcg IMX_LPCG_CLK_4>,
-                        <&can0_lpcg IMX_LPCG_CLK_0>;
+               clocks = <&can0_lpcg 1>,
+                        <&can0_lpcg 0>;
                clock-names = "ipg", "per";
                assigned-clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>;
                assigned-clock-rates = <40000000>;
@@ -431,8 +431,8 @@ flexcan3: can@5a8f0000 {
                 * CAN2 shares CAN0's clock and to enable CAN0's clock it
                 * has to be powered on.
                 */
-               clocks = <&can0_lpcg IMX_LPCG_CLK_4>,
-                        <&can0_lpcg IMX_LPCG_CLK_0>;
+               clocks = <&can0_lpcg 1>,
+                        <&can0_lpcg 0>;
                clock-names = "ipg", "per";
                assigned-clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>;
                assigned-clock-rates = <40000000>;
-- 
2.34.1

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