From: Ong Boon Leong <boon.leong....@intel.com>
BayTrail ACPI mode SPI is not read/writing correctly at low speeds
using DMA mode. Changing DMA SRC_MSIZE and
DEST_MSIZE of SPI FIFO side from 16 to 32 fixes the issue.
Signed-off-by: Ong Boon Leong <boon.leong....@intel.com>
---
...Fix-BYT-ACPI-mode-SPI-DMA-transfer-failur.patch | 68 ++++++++++++++++++++
1 file changed, 68 insertions(+)
create mode 100644
meta/cfg/kernel-cache/features/valleyisland-io/0003-spi-pxa2xx-Fix-BYT-ACPI-mode-SPI-DMA-transfer-failur.patch
diff --git
a/meta/cfg/kernel-cache/features/valleyisland-io/0003-spi-pxa2xx-Fix-BYT-ACPI-mode-SPI-DMA-transfer-failur.patch
b/meta/cfg/kernel-cache/features/valleyisland-io/0003-spi-pxa2xx-Fix-BYT-ACPI-mode-SPI-DMA-transfer-failur.patch
new file mode 100644
index 0000000..2a484b7
--- /dev/null
+++
b/meta/cfg/kernel-cache/features/valleyisland-io/0003-spi-pxa2xx-Fix-BYT-ACPI-mode-SPI-DMA-transfer-failur.patch
@@ -0,0 +1,68 @@
+From 65730ba793f1427bc971b36d79eba0a6e57d5479 Mon Sep 17 00:00:00 2001
+From: Ong Boon Leong <boon.leong....@intel.com>
+Date: Wed, 22 Jan 2014 16:35:29 +0800
+Subject: [PATCH] spi/pxa2xx: Fix BYT ACPI mode SPI DMA transfer failure at
+ low speeds
+
+For Intel BayTrail, under ACPI mode, SPI is not reading/writing
+correctly at low speeds when using DMA mode. Fix the issue by
+changing DMA SRC_MSIZE and DEST_MSIZE of SPI FIFO side from 16 to 32.
+
+Signed-off-by: Ong Boon Leong <boon.leong....@intel.com>
+---
+ drivers/spi/spi-pxa2xx.c | 25 +++++++++++++++++++------
+ 1 file changed, 19 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c
+index 1e2aa26..1c252bf 100644
+--- a/drivers/spi/spi-pxa2xx.c
++++ b/drivers/spi/spi-pxa2xx.c
+@@ -45,6 +45,15 @@ MODULE_DESCRIPTION("PXA2xx SSP SPI Controller");
+ MODULE_LICENSE("GPL");
+ MODULE_ALIAS("platform:pxa2xx-spi");
+
++#ifdef CONFIG_ACPI
++static struct acpi_device_id pxa2xx_spi_acpi_match[] = {
++ { "INT33C0", 0 },
++ { "INT33C1", 0 },
++ { "80860F0E", 0 },
++ { },
++};
++#endif
++
+ #define MAX_BUSES 3
+
+ #define TIMOUT_DFLT 1000
+@@ -962,6 +971,16 @@ static int setup(struct spi_device *spi)
+ * DMA with them.
+ */
+ chip->enable_dma = drv_data->master_info->enable_dma;
++#ifdef CONFIG_ACPI
++ /*
++ * Detect if spi device belongs to Intel BayTrail.
++ * If true, set dma_burst_size to 32 in order
++ * to fix data read/write corruption at low speed mode.
++ */
++ if (acpi_match_device(pxa2xx_spi_acpi_match, &spi->dev)
++ == (struct acpi_device_id *) "80860F0E")
++ chip->dma_burst_size = 32;
++#endif
+ }
+
+ chip->threshold = (SSCR1_RxTresh(rx_thres) & SSCR1_RFT) |
+@@ -1103,12 +1122,6 @@ pxa2xx_spi_acpi_get_pdata(struct platform_device *pdev)
+ return pdata;
+ }
+
+-static struct acpi_device_id pxa2xx_spi_acpi_match[] = {
+- { "INT33C0", 0 },
+- { "INT33C1", 0 },
+- { "80860F0E", 0 },
+- { },
+-};
+ MODULE_DEVICE_TABLE(acpi, pxa2xx_spi_acpi_match);
+ #else
+ static inline struct pxa2xx_spi_master *
+--
+1.7.10.4
+
--
1.7.10.4
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