From: Ong Boon Leong <boon.leong....@intel.com>
Add support for Intel Low Power I/O subsystem PWM controllers found
on some newer intel chipsets.
Signed-off-by: Ong Boon Leong <boon.leong....@intel.com>
---
...support-for-Intel-Low-Power-Subsystem-PWM.patch | 245 ++++++++++++++++++++
1 file changed, 245 insertions(+)
create mode 100644
meta/cfg/kernel-cache/features/valleyisland-io/0005-pwm-add-support-for-Intel-Low-Power-Subsystem-PWM.patch
diff --git
a/meta/cfg/kernel-cache/features/valleyisland-io/0005-pwm-add-support-for-Intel-Low-Power-Subsystem-PWM.patch
b/meta/cfg/kernel-cache/features/valleyisland-io/0005-pwm-add-support-for-Intel-Low-Power-Subsystem-PWM.patch
new file mode 100644
index 0000000..4731a5c
--- /dev/null
+++
b/meta/cfg/kernel-cache/features/valleyisland-io/0005-pwm-add-support-for-Intel-Low-Power-Subsystem-PWM.patch
@@ -0,0 +1,245 @@
+From 37f067f9996dac4b40e23a3092e43c6cdeed08df Mon Sep 17 00:00:00 2001
+From: Mika Westerberg <mika.westerb...@linux.intel.com>
+Date: Tue, 18 Sep 2012 15:38:42 +0300
+Subject: [PATCH 05/17] pwm: add support for Intel Low Power Subsystem PWM
+
+Add support for Intel Low Power I/O subsystem PWM controllers found on some
+newer intel chipsets.
+
+Signed-off-by: Mika Westerberg <mika.westerb...@linux.intel.com>
+
+ - this patch is derived based on Mika Westerberg's work.
+
+Signed-off-by: Chew, Chiau Ee <chiau.ee.c...@intel.com>
+---
+ drivers/pwm/Kconfig | 10 +++
+ drivers/pwm/Makefile | 1
+ drivers/pwm/pwm-lpss.c | 183 ++++++++++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 194 insertions(+), 0 deletions(-)
+ create mode 100644 drivers/pwm/pwm-lpss.c
+
+diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
+index 03120a8..bc26b91 100644
+--- a/drivers/pwm/Kconfig
++++ b/drivers/pwm/Kconfig
+@@ -79,6 +79,16 @@ config PWM_LPC32XX
+ To compile this driver as a module, choose M here: the module
+ will be called pwm-lpc32xx.
+
++config PWM_LPSS
++ tristate "Intel LPSS PWM support"
++ depends on ACPI
++ help
++ Generic PWM framework driver for Intel Low Power Subsystem PWM
++ controller.
++
++ To compile this driver as a module, choose M here: the module
++ will be called pwm-lpio.
++
+ config PWM_MXS
+ tristate "Freescale MXS PWM support"
+ depends on ARCH_MXS && OF
+diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile
+index f98371b..f020fa3 100644
+--- a/drivers/pwm/Makefile
++++ b/drivers/pwm/Makefile
+@@ -5,6 +5,7 @@ obj-$(CONFIG_PWM_BFIN) += pwm-bfin.o
+ obj-$(CONFIG_PWM_IMX) += pwm-imx.o
+ obj-$(CONFIG_PWM_JZ4740) += pwm-jz4740.o
+ obj-$(CONFIG_PWM_LPC32XX) += pwm-lpc32xx.o
++obj-$(CONFIG_PWM_LPSS) += pwm-lpss.o
+ obj-$(CONFIG_PWM_MXS) += pwm-mxs.o
+ obj-$(CONFIG_PWM_PUV3) += pwm-puv3.o
+ obj-$(CONFIG_PWM_PXA) += pwm-pxa.o
+diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lpss.c
+new file mode 100644
+index 0000000..fb3548c
+--- /dev/null
++++ b/drivers/pwm/pwm-lpss.c
+@@ -0,0 +1,183 @@
++/*
++ * Intel Low Power Subsystem PWM controller driver
++ *
++ * Copyright (C) 2013, Intel Corporation
++ * Author: Mika Westerberg <mika.westerb...@linux.intel.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#include <linux/acpi.h>
++#include <linux/clk.h>
++#include <linux/device.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/pwm.h>
++#include <linux/platform_device.h>
++
++#define PWM 0x00000000
++#define PWM_ENABLE BIT(31)
++#define PWM_SW_UPDATE BIT(30)
++#define PWM_BASE_UNIT_SHIFT 8
++#define PWM_BASE_UNIT_MASK 0x00ffff00
++#define PWM_ON_TIME_DIV_MASK 0x000000ff
++
++struct pwm_lpss_chip {
++ struct pwm_chip chip;
++ void __iomem *regs;
++ struct clk *clk;
++};
++
++static inline struct pwm_lpss_chip *to_lpwm(struct pwm_chip *chip)
++{
++ return container_of(chip, struct pwm_lpss_chip, chip);
++}
++
++static void pwm_lpss_set_state(struct pwm_lpss_chip *lpwm, bool enable)
++{
++ u32 ctrl;
++
++ ctrl = readl(lpwm->regs + PWM);
++ if (enable)
++ ctrl |= PWM_ENABLE;
++ else
++ ctrl &= ~PWM_ENABLE;
++ writel(ctrl, lpwm->regs + PWM);
++}
++
++static int pwm_lpss_config(struct pwm_chip *chip, struct pwm_device *pwm,
++ int duty_ns, int period_ns)
++{
++ struct pwm_lpss_chip *lpwm = to_lpwm(chip);
++ u8 base_unit_hi, base_unit_lo, on_time_div;
++ unsigned long c = clk_get_rate(lpwm->clk);
++ unsigned long hz, cycle_cnt;
++ u32 ctrl;
++
++ hz = 1000000000UL / period_ns;
++
++ /*
++ * There is no duty cycle resolution if base_unit value is higher
++ * than 128.
++ */
++ base_unit_hi = (hz * 256) / c;
++ if (base_unit_hi > 128)
++ return -EINVAL;
++
++ base_unit_lo = (hz * 65536) / c;
++ cycle_cnt = base_unit_hi ? 256 / base_unit_hi : 256;
++
++ if (duty_ns <= 0)
++ duty_ns = 1;
++
++ on_time_div = cycle_cnt / (period_ns / duty_ns);
++
++ ctrl = readl(lpwm->regs + PWM);
++ ctrl &= ~(PWM_BASE_UNIT_MASK | PWM_ON_TIME_DIV_MASK);
++ ctrl |= (base_unit_hi | base_unit_lo) << PWM_BASE_UNIT_SHIFT;
++ ctrl |= on_time_div;
++ /* request PWM to update on next cycle */
++ ctrl |= PWM_SW_UPDATE;
++ writel(ctrl, lpwm->regs + PWM);
++
++ return 0;
++}
++
++static int pwm_lpss_enable(struct pwm_chip *chip, struct pwm_device *pwm)
++{
++ struct pwm_lpss_chip *lpwm = to_lpwm(chip);
++
++ clk_prepare_enable(lpwm->clk);
++ pwm_lpss_set_state(lpwm, true);
++ return 0;
++}
++
++static void pwm_lpss_disable(struct pwm_chip *chip, struct pwm_device *pwm)
++{
++ struct pwm_lpss_chip *lpwm = to_lpwm(chip);
++
++ pwm_lpss_set_state(lpwm, false);
++ clk_disable_unprepare(lpwm->clk);
++}
++
++static const struct pwm_ops pwm_lpss_ops = {
++ .config = pwm_lpss_config,
++ .enable = pwm_lpss_enable,
++ .disable = pwm_lpss_disable,
++ .owner = THIS_MODULE,
++};
++
++static int pwm_lpss_probe(struct platform_device *pdev)
++{
++ struct pwm_lpss_chip *lpwm;
++ struct resource *r;
++ int ret;
++
++ lpwm = devm_kzalloc(&pdev->dev, sizeof(*lpwm), GFP_KERNEL);
++ if (!lpwm)
++ return -ENOMEM;
++
++ lpwm->chip.dev = &pdev->dev;
++ lpwm->chip.ops = &pwm_lpss_ops;
++ lpwm->chip.base = -1;
++ lpwm->chip.npwm = 1;
++
++ lpwm->clk = devm_clk_get(&pdev->dev, NULL);
++ if (IS_ERR(lpwm->clk)) {
++ dev_err(&pdev->dev, "failed to get pwm clk\n");
++ return -ENODEV;
++ }
++
++ r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++ if (!r) {
++ dev_err(&pdev->dev, "failed to get mmio base\n");
++ return -ENODEV;
++ }
++
++ lpwm->regs = devm_request_and_ioremap(lpwm->chip.dev, r);
++ if (!lpwm->regs)
++ return -EBUSY;
++
++ ret = pwmchip_add(&lpwm->chip);
++ if (ret) {
++ dev_err(&pdev->dev, "failed to add PWM chip: %d\n", ret);
++ return ret;
++ }
++
++ platform_set_drvdata(pdev, lpwm);
++ return 0;
++}
++
++static int pwm_lpss_remove(struct platform_device *pdev)
++{
++ struct pwm_lpss_chip *lpwm = platform_get_drvdata(pdev);
++
++ pwm_lpss_set_state(lpwm, false);
++ return pwmchip_remove(&lpwm->chip);
++}
++
++#ifdef CONFIG_ACPI
++static const struct acpi_device_id pwm_lpss_acpi_match[] = {
++ { "80860F08", 0 },
++ { "80860F09", 0 },
++ { },
++};
++MODULE_DEVICE_TABLE(acpi, pwm_lpss_acpi_match);
++#endif
++
++static struct platform_driver pwm_lpss_driver = {
++ .driver = {
++ .name = "pwm-lpss",
++ .acpi_match_table = ACPI_PTR(pwm_lpss_acpi_match),
++ },
++ .probe = pwm_lpss_probe,
++ .remove = pwm_lpss_remove,
++};
++module_platform_driver(pwm_lpss_driver);
++
++MODULE_DESCRIPTION("PWM driver for Intel LPSS");
++MODULE_AUTHOR("Mika Westerberg <mika.westerb...@linux.intel.com>");
++MODULE_LICENSE("GPL");
++MODULE_ALIAS("platform:pwm-lpss");
+--
+1.7.4.4
+
--
1.7.10.4
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