Ollie Lho <[EMAIL PROTECTED]> writes:
> "Eric W. Biederman" wrote:
> > That is right in the middle of the PCI io port space wild. That is a
> > trick I hadn't realized.
> >
>
> Does it not conflict with usual PCI IO transaction ?? I remember you
> can do single byte PCI Config Space byte read/write these byte aligned
> IO ports.
No because those are at 0xcfc + offset.
It comes pretty close though. 0xcf8 must be written with a long word
to set the pci configuration space address.
> > Does ACPI require a watchdog timer?
> >
>
> I dunno. But it seems all SiS chipset uses this way to support software
> reboot/halt.
O.k. This sounds reasonable. Now we just need a watchdog timer
driver in the linux kernel :)
Eric
