On Mon, May 30, 2016 at 07:27:11AM +1000, Benjamin Herrenschmidt wrote: > > > This enables us to share the same page table code for > > > both radix and hash. Radix use a hardware defined big endian > > > page table > > This is measurably worse (a little over 2% on POWER8) on a futex > > microbenchmark: > > That is surprising, do we have any idea what specifically increases the > overhead so significantly ? Does gcc know about ldbrx/stdbrx ? I notice > in our io.h for example we still do manual ld/std + swap because old > processors didn't know these, we should fix that for CONFIG_POWER8 (or > is it POWER7 that brought these ?).
GCC knows about ldbrx. ldbrx is v2.06, i.e. POWER7 (Cell also has it). As Michael says, we really want to have a byterev insn as well :-) GCC does not know this is a big sequence of instructions, and it only _has_ it as one insn, until after register allocation. If things get put in memory it is one insn, but the reg-reg sequence is a whopping nine instructions :-/ Segher _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
