> >>> +int enetc_mdio_update_mdc_div(struct mii_bus *bus) {
> >>> + struct enetc_mdio_priv *mdio_priv = bus->priv;
> >>> + struct device *dev = bus->parent;
> >>> + struct clk *enet_clk;
> >>> + u32 div, mdc_freq;
> >>> +
> >>> + if (device_property_read_u32(dev, "clock-frequency", &mdc_freq))
> >>> + return 0;
> >>> +
> >>> + enet_clk = devm_clk_get(dev, NULL);
> >>> + if (IS_ERR(enet_clk))
> >>> + return dev_err_probe(dev, PTR_ERR(enet_clk),
> >>> + "Input clock unknown, not changing MDC
> >> frequency\n");
> >>
> >> binding said clock is optional. If return failure here, it will block
> >> existing dts, which have not clock property.
> >>
> >
> > For EMDIO device, the clocks property is not added to
> > fsl,enetc-mdio.yaml, I suppose this property should be added to the
> > dt-binding doc if the clock is really needed here.
>
> Isn't this what 1/2 in this series does ? (maybe I misunderstood this
> paragraph)
Sorry, my email filtered out the 1/2 patch, so I missed it.
>
> > For ENETC device, we already have a 'ref' clock in the enetc node, so
> > devm_clk_get(dev, NULL) may get the 'ref' clock rather than the system
> > clock of NETC.
> Shouldn't the clock be described in the MDIO DT node ?
The enetc_mdio_read_* and enetc_mdio_write_* interfaces are not only
used by EMDIO devices, the ENETCs and NETC switches also use them.
NETC switches and ENETCs can access external PHYs or internal PCS/Serdes
through their own port MDIO registers, instead of through EMDIO devices.
Your first patch only modified the EMDIO binding-doc, not the ENETC and
switch binding-doc.
