> +             L2: l2-cache-control...@20000 {
> +                     compatible = "fsl,p2020-l2-cache-controller";
> +                     reg = <0x20000 0x1000>;
> +                     cache-line-size = <32>; // 32 bytes
> +                     cache-size = <0x100000>; // L2, 1M
> +                     interrupt-parent = <&mpic>;
> +                     interrupts = <16 2>;
> +             };

One nit --here should be 512KB L2 cache

> +             u...@22000 {
> +                     #address-cells = <1>;
> +                     #size-cells = <0>;
> +                     compatible = "fsl-usb2-mph";
> +                     reg = <0x22000 0x1000>;
> +                     interrupt-parent = <&mpic>;
> +                     interrupts = <28 0x2>;
> +                     phy_type = "ulpi";
> +             };

It should be "fsl-usb2-dr"
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