I'm tracking a problem that's leading me through DSI and DTLB miss exceptions on an MPC8347 (e300c1 core), and I've come across an oddity that I'm hoping someone can explain.
When a DTLB Miss exception can't find a PTE for the virtual address being written/read, it dummies up the SPRs for a DSI exception and then calls directly into the DSI exception code. Just before the DTLB miss code stores a value into DSISR it sets bit 2, which for a DSI exception is a reserved bit and should be cleared. There's no comment on the code (.../arch/powerpc/kernel/head_32.S line 619 of the 2.6.33-rc1 kernel). Can anyone tell me why this bit is getting set? Thanks. Bruce _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
