On Thu, Feb 26, 2015 at 05:01:21PM -0500, Rich Schmidt wrote: > I compared the logged phase offsets from ptp4l and phc2sys using log level > 6 or 7. In order to do a physical phase measurement I need to program the > software definable pins on the i210 header to output 1PPS, which can then > be compared with a time interval counter to the USNO Master Clock 1PPS > reference. I have yet to modify the igb driver to do that, stay tuned.
FYI my patches to enable the i210 pins hit mainline as of v4.0-rc1. 720db4f igb: enable auxiliary PHC functions for the i210 00c6557 igb: enable internal PPS for the i210 8298c1e igb: serialize access to the time sync interrupt registers 61d7f75 igb: refactor time sync interrupt handling Thanks, Richard ------------------------------------------------------------------------------ Dive into the World of Parallel Programming The Go Parallel Website, sponsored by Intel and developed in partnership with Slashdot Media, is your hub for all things parallel software development, from weekly thought leadership blogs to news, videos, case studies, tutorials and more. Take a look and join the conversation now. http://goparallel.sourceforge.net/ _______________________________________________ Linuxptp-devel mailing list Linuxptp-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/linuxptp-devel
