================
@@ -90,13 +123,16 @@ bool llvm::checkVOPDRegConstraints(const SIInstrInfo &TII,
if (MI.getDesc().hasImplicitUseOfPhysReg(AMDGPU::VCC))
UniqueScalarRegs.insert(AMDGPU::VCC_LO);
- if (IsVOPD3) {
- if (const MachineOperand *Src1 =
- TII.getNamedOperand(MI, AMDGPU::OpName::src1)) {
- if (!Src1->isReg() || !TRI->isVGPR(MRI, Src1->getReg()))
- return false;
- }
+ if (const MachineOperand *Src1 =
+ TII.getNamedOperand(MI, AMDGPU::OpName::src1)) {
+ if (IsVOPD3 && !Src1->isReg())
+ return false;
+ if (Src1->isReg() &&
+ !isValidVOPDSrc(TII, VOPDOpc, CompIdx, 1, Src1->getReg()))
----------------
petar-avramovic wrote:
new check for VOPD, equivalent check for VOPD3 (with current instructions)
https://github.com/llvm/llvm-project/pull/196515
_______________________________________________
llvm-branch-commits mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits