================
@@ -105,7 +141,8 @@ bool llvm::checkVOPDRegConstraints(const SIInstrInfo &TII,
return false;
} else if (MI.getOpcode() == AMDGPU::V_CNDMASK_B32_e64) {
UniqueScalarRegs.insert(Src2->getReg());
- } else if (!Src2->isReg() || !TRI->isVGPR(MRI, Src2->getReg())) {
+ } else if (!Src2->isReg() ||
+ !isValidVOPDSrc(TII, VOPDOpc, CompIdx, 2, Src2->getReg())) {
----------------
petar-avramovic wrote:
equivalent check for VOPD3 + could also check if src2 in V_CNDMASK_B32_e64
(sgpr) fits in appropriate reg class on VOPDOpc
https://github.com/llvm/llvm-project/pull/196515
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