Hi Robert, For a clear example, suppose that we have an NPU that is multi-core and that each core serves two interfaces.
This could be modeled using one power group per core, with the interfaces listing their own optics power and pointing to the power-group for the attached core. You may not like this particular architecture, but it is similar to what is commonly done. There are many ways of architecting hardware. We have intentionally tried to be abstract, so that we are inclusive. Note that this could easily be in a 1RU box. Tony On Wed, Jul 22, 2026 at 12:28 PM Robert Raszuk <[email protected]> wrote: > > Hi Tony, > > Great example. > > And how would that be mapped to the concept of power groups ? > > How do you associate cores of the CPU to network topology ? Likewise for > ASICs ... is it always hardwired with physical interfaces ? That would be > highly inefficient. > > Thx, > R. > > > > On Wed, Jul 22, 2026 at 12:23 PM Tony Li <[email protected]> wrote: > >> >> Hi Robert, >> >> The ARM Cortex-A53 is an example of a multi-core CPU that supports clock >> gating on its cores. >> >> It's technical reference manual: >> https://community.arm.com/cfs-file/__key/communityserver-discussions-components-files/80/DDI0515A3b_5F00_juno_5F00_arm_5F00_development_5F00_platform_5F00_soc_5F00_trm.pdf >> >> Other modern ASICs use similar schemes. >> >> Tony >> >> >> On Wed, Jul 22, 2026 at 12:12 PM Robert Raszuk - robert at raszuk.net < >> [email protected]> wrote: >> >>> Hi Rob, >>> >>> Could you provide some real examples of those "modern ASICs" where you >>> can turn on/off parts of it ? >>> >>> Any pointers to APIs you could share would also be nice. >>> >>> Thx, >>> R. >>> >>> >>> On Wed, Jul 22, 2026 at 10:31 AM Rob Evans <[email protected]> >>> wrote: >>> >>>> > Also the simplicity of the pizza box the electronics is minimal and >>>> the main power draw is just the ASIC. As mentioned my Robert all you can >>>> do is turn off SFP laser. >>>> >>>> I'm not in Vienna, so this may be out of context. However, as a >>>> standalone statement that isn't true for many modern ASICs, where you >>>> can power off parts of the ASIC that aren't being used. >>>> >>>> Cheers, >>>> Rob >>>> >>>> _______________________________________________ >>>> Lsr mailing list -- [email protected] >>>> To unsubscribe send an email to [email protected] >>>> >>> _______________________________________________ >>> Lsr mailing list -- [email protected] >>> To unsubscribe send an email to [email protected] >>> >>
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