The MiSTer is based on the Terasic DE-10 nano, which is based on a Cyclone 5. The board has 1GB of DDR3 RAM, but most MiSTers are build with an add-on board containing 32 or 128 (or more) MB of SDRAM so you don't have to deal with DDR.
-Josh On Sun, Apr 19, 2020 at 8:34 PM Ken Pettit <petti...@gmail.com> wrote: > I have most of one. It has been quite some time since I worked on it, > but I had it running a modified version of the M100 ROM. > > It was working on an Actel FPGA at the time sometime in the 2009 - 2010 > timeframe, but I believe that FPGA is now obsolete. But it is mostly > just Verilog / VHDL code that could be ported to any FPGA. > > When I say modified ROM, the modifications were because I had extended > the 8085 CPU with 24- bit registers and relative branches. I had it > running in simulation a few months back. From what I recall, I had > modules for the LCD, keyboard, 80155, etc. > > What type of FPGA are you interested in using? I typically use Xilinx > these days. > > Ken > > On 4/19/20 4:28 PM, Sean O'Rourke wrote: > > I know this is a crazy random question. > > > > Not sure if anyone here has an FPGA programming knowledge and who could > make a core or know someone who could make a core for the 100/102 for the > MiSTer project. Would be a really awesome option to have an FPGA version of > the 100. > > > > Sean > >
