Frantisek Dufka wrote:
better resolution and better utilization of both main CPU and DSP. Or is
there some catch why doing it on DSP makes better sense? AFAIK the main
ARM CPU should be better suited for the task than the DSP.
While I've not started working in depth on the OMAP1710, I do have
experience with signal processing and embedded programming - so take
this for what it's worth.
The ARM does not have floating point, only integer math, so any
processing of the video has to be done in integer, and there are a great
deal of the operations that really don't fit well.
The DSP may not have floating point, but it has fixed point, which is a
hybrid of integer and floating point where 1.0000 is represented by
0x7FFFFFFF and -1 is 0x80000000. The DSP automatically handles shifting
multiplies, so that 0x7FFFFFFF * 0x7FFFFFFF = 0x7FFFFFFF (1.0 * 1.0 =
1.0), so you can do many sorts of non-integer math very quickly. Also,
many of the operations in video codecs are multiply-and-accumulate
operations ( a += b*c ), which DSPs have a single instruction to do.
In short, clock per clock, I suspect the DSP can do more video work than
the ARM can.
Now, you *could* make the argument that if the workload of decoding
video could somehow be split between the 2 processor cores there might
be some benefit - maybe leave the video scaling to the ARM but let the
video coding be done by the DSP core. However, the real limiting factor
may not even be MIPS, but rather bandwidth - the speed at which the ARM
can pull the data out of flash (esp. MMC - that's not exactly the
speediest interface in the world), and the speed at which data can be
moved into the video buffer.
Remember what step 0 of optimization is: MEASURE IT FIRST!
Until somebody can actually measure where all the time is going, making
pronouncements like "It's slow because of X - I just know it" are the
root of all evil - you spend a great deal of time tweaking that one
thing only to find out that it was only 1% of the time to begin with.
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