[Mesa-dev] [PATCH 55/61] radeonsi: don't load PrimID in TES if it's not used

[Marek Olšák]

From: Marek Olšák <marek.ol...@amd.com>

---
 src/gallium/drivers/radeonsi/si_state_shaders.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c 
b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 94fc0e4..5bbc037 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -539,21 +539,21 @@ static void si_shader_es(struct si_screen *sscreen, 
struct si_shader *shader)
        if (!pm4)
                return;
 
        va = shader->bo->gpu_address;
        si_pm4_add_bo(pm4, shader->bo, RADEON_USAGE_READ, 
RADEON_PRIO_SHADER_BINARY);
 
        if (shader->selector->type == PIPE_SHADER_VERTEX) {
                vgpr_comp_cnt = shader->info.uses_instanceid ? 3 : 0;
                num_user_sgprs = SI_VS_NUM_USER_SGPR;
        } else if (shader->selector->type == PIPE_SHADER_TESS_EVAL) {
-               vgpr_comp_cnt = 3; /* all components are needed for TES */
+               vgpr_comp_cnt = shader->selector->info.uses_primid ? 3 : 2;
                num_user_sgprs = SI_TES_NUM_USER_SGPR;
        } else
                unreachable("invalid shader selector type");
 
        oc_lds_en = shader->selector->type == PIPE_SHADER_TESS_EVAL ? 1 : 0;
 
        si_pm4_set_reg(pm4, R_028AAC_VGT_ESGS_RING_ITEMSIZE,
                       shader->selector->esgs_itemsize / 4);
        si_pm4_set_reg(pm4, R_00B320_SPI_SHADER_PGM_LO_ES, va >> 8);
        si_pm4_set_reg(pm4, R_00B324_SPI_SHADER_PGM_HI_ES, va >> 40);
@@ -753,21 +753,21 @@ static void si_shader_gs(struct si_screen *sscreen, 
struct si_shader *shader)
 
        if (sscreen->b.chip_class >= GFX9) {
                unsigned input_prim = 
sel->info.properties[TGSI_PROPERTY_GS_INPUT_PRIM];
                unsigned es_type = shader->key.part.gs.es->type;
                unsigned es_vgpr_comp_cnt, gs_vgpr_comp_cnt;
                struct gfx9_gs_info gs_info;
 
                if (es_type == PIPE_SHADER_VERTEX)
                        es_vgpr_comp_cnt = shader->info.uses_instanceid ? 3 : 0;
                else if (es_type == PIPE_SHADER_TESS_EVAL)
-                       es_vgpr_comp_cnt = 3; /* all components are needed for 
TES */
+                       es_vgpr_comp_cnt = 
shader->key.part.gs.es->info.uses_primid ? 3 : 2;
                else
                        unreachable("invalid shader selector type");
 
                /* If offsets 4, 5 are used, GS_VGPR_COMP_CNT is ignored and
                 * VGPR[0:4] are always loaded.
                 */
                if (sel->info.uses_invocationid)
                        gs_vgpr_comp_cnt = 3; /* VGPR3 contains InvocationID. */
                else if (sel->info.uses_primid)
                        gs_vgpr_comp_cnt = 2; /* VGPR2 contains PrimitiveID. */
@@ -871,21 +871,21 @@ static void si_shader_vs(struct si_screen *sscreen, 
struct si_shader *shader,
        va = shader->bo->gpu_address;
        si_pm4_add_bo(pm4, shader->bo, RADEON_USAGE_READ, 
RADEON_PRIO_SHADER_BINARY);
 
        if (gs) {
                vgpr_comp_cnt = 0; /* only VertexID is needed for GS-COPY. */
                num_user_sgprs = SI_GSCOPY_NUM_USER_SGPR;
        } else if (shader->selector->type == PIPE_SHADER_VERTEX) {
                vgpr_comp_cnt = shader->info.uses_instanceid ? 3 : 
(enable_prim_id ? 2 : 0);
                num_user_sgprs = SI_VS_NUM_USER_SGPR;
        } else if (shader->selector->type == PIPE_SHADER_TESS_EVAL) {
-               vgpr_comp_cnt = 3; /* all components are needed for TES */
+               vgpr_comp_cnt = shader->selector->info.uses_primid ? 3 : 2;
                num_user_sgprs = SI_TES_NUM_USER_SGPR;
        } else
                unreachable("invalid shader selector type");
 
        /* VS is required to export at least one param. */
        nparams = MAX2(shader->info.nr_param_exports, 1);
        si_pm4_set_reg(pm4, R_0286C4_SPI_VS_OUT_CONFIG,
                       S_0286C4_VS_EXPORT_COUNT(nparams - 1));
 
        si_pm4_set_reg(pm4, R_02870C_SPI_SHADER_POS_FORMAT,
-- 
2.7.4

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