Please ignore this patch. There are some regressions with depth_resolve piglit tests.
Marek On Fri, Jun 16, 2017 at 2:58 PM, Marek Olšák <mar...@gmail.com> wrote: > From: Marek Olšák <marek.ol...@amd.com> > > --- > src/gallium/drivers/radeonsi/si_hw_context.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c > b/src/gallium/drivers/radeonsi/si_hw_context.c > index 5d930a6..b420c9f 100644 > --- a/src/gallium/drivers/radeonsi/si_hw_context.c > +++ b/src/gallium/drivers/radeonsi/si_hw_context.c > @@ -122,20 +122,23 @@ void si_context_gfx_flush(void *context, unsigned flags, > } > > ctx->gfx_flush_in_progress = true; > > /* This CE dump should be done in parallel with the last draw. */ > if (ctx->ce_ib) > si_ce_save_all_descriptors_at_ib_end(ctx); > > r600_preflush_suspend_features(&ctx->b); > > + /* The kernel-side fence will flush everything. */ > + ctx->b.flags = 0; > + > /* DRM 3.1.0 doesn't flush TC for VI correctly. */ > if (ctx->b.chip_class == VI && ctx->b.screen->info.drm_minor <= 1) { > ctx->b.flags |= SI_CONTEXT_PS_PARTIAL_FLUSH | > SI_CONTEXT_CS_PARTIAL_FLUSH | > SI_CONTEXT_INV_GLOBAL_L2 | > SI_CONTEXT_INV_VMEM_L1; > } > > si_emit_cache_flush(ctx); > > -- > 2.7.4 > _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev