And here we are.... I think I'd still like byte_offset better but, either way patches 31 and 32 are
Reviewed-by: Jason Ekstrand <ja...@jlekstrand.net> On Tue, Dec 4, 2018 at 1:18 AM Iago Toral Quiroga <ito...@igalia.com> wrote: > In SIMD8 we pack 2 vector components in a single SIMD register, so > for example, component Y of a 16-bit vec2 starts is at byte offset > 16B. This means that when we compute the offset of the elements to > be differentiated we should not stomp whatever base offset we have, > but instead add to it. > --- > src/intel/compiler/brw_fs_generator.cpp | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/src/intel/compiler/brw_fs_generator.cpp > b/src/intel/compiler/brw_fs_generator.cpp > index bffd9bc4787..d8e4bae17e0 100644 > --- a/src/intel/compiler/brw_fs_generator.cpp > +++ b/src/intel/compiler/brw_fs_generator.cpp > @@ -1259,7 +1259,7 @@ fs_generator::generate_ddx(const fs_inst *inst, > struct brw_reg src0 = src; > struct brw_reg src1 = src; > > - src0.subnr = type_sz(src.type); > + src0.subnr += type_sz(src.type); > src0.vstride = vstride; > src0.width = width; > src0.hstride = BRW_HORIZONTAL_STRIDE_0; > @@ -1325,8 +1325,8 @@ fs_generator::generate_ddy(const fs_inst *inst, > /* replicate the derivative at the top-left pixel to other pixels */ > struct brw_reg src0 = stride(src, 4, 4, 0); > struct brw_reg src1 = stride(src, 4, 4, 0); > - src0.subnr = 0 * type_size; > - src1.subnr = 2 * type_size; > + src0.subnr += 0 * type_size; > + src1.subnr += 2 * type_size; > > brw_ADD(p, dst, negate(src0), src1); > } > -- > 2.17.1 > > _______________________________________________ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev >
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