Reviewed-by: Jordan Justen <jordan.l.jus...@intel.com>
On 2015-11-13 15:05:17, Kenneth Graunke wrote: > Up until now, we've been letting core Mesa initialize it to 36 for us > (which is presumably BRW_MAX_UBO (12) * (VS+GS+FS stages -> 3)). > > With compute and tessellation, we need to increase this. > > Signed-off-by: Kenneth Graunke <kenn...@whitecape.org> > --- > src/mesa/drivers/dri/i965/brw_context.c | 1 + > 1 file changed, 1 insertion(+) > > Patch depends on 2/2: "i965: Clean up context constant initialization code." > > diff --git a/src/mesa/drivers/dri/i965/brw_context.c > b/src/mesa/drivers/dri/i965/brw_context.c > index e70ad98..2ea0a9e 100644 > --- a/src/mesa/drivers/dri/i965/brw_context.c > +++ b/src/mesa/drivers/dri/i965/brw_context.c > @@ -391,6 +391,7 @@ brw_initialize_context_constants(struct brw_context *brw) > ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits); > > ctx->Const.MaxUniformBufferBindings = num_stages * BRW_MAX_UBO; > + ctx->Const.MaxCombinedUniformBlocks = num_stages * BRW_MAX_UBO; > ctx->Const.MaxCombinedAtomicBuffers = num_stages * BRW_MAX_ABO; > ctx->Const.MaxCombinedShaderStorageBlocks = num_stages * BRW_MAX_SSBO; > ctx->Const.MaxShaderStorageBufferBindings = num_stages * BRW_MAX_SSBO; > -- > 2.6.2 > > _______________________________________________ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/mesa-dev _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
