Keith Whitwell pisze:
On Fri, 2009-10-30 at 10:19 -0700, michal wrote:
Brian Paul pisze:
Keith Whitwell wrote:
On Fri, 2009-10-30 at 04:36 -0700, michal wrote:
Keith Whitwell pisze:
On Fri, 2009-10-30 at 03:43 -0700, michal wrote:
gallium: Add a PREDICATE register file.
There's already a shader token that allows composition of predicated
instructions (tgsi_instruction_ext_predicate). However, there is no way
one can write to thos predicate registers in the first place.
---
src/gallium/include/pipe/p_shader_tokens.h | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/src/gallium/include/pipe/p_shader_tokens.h
b/src/gallium/include/pipe/p_shader_tokens.h
index de338c4..6aa8b27 100644
--- a/src/gallium/include/pipe/p_shader_tokens.h
+++ b/src/gallium/include/pipe/p_shader_tokens.h
@@ -79,6 +79,7 @@ enum tgsi_file_type {
TGSI_FILE_ADDRESS =6,
TGSI_FILE_IMMEDIATE =7,
TGSI_FILE_LOOP =8,
+ TGSI_FILE_PREDICATE =9,
TGSI_FILE_COUNT /**< how many TGSI_FILE_ types */
};
Michal,
Is your expectation that all drivers become able to understand
instructions with predicates? That seems unreasonable.
What is the expected way of setting a predicate register? What
functionality will use this?
For example:
DECL IN[0..1]
DECL OUT[0]
DECL PRED[0]
1: MOV OUT[0], IN[0]
2: SGT PRED[0], IN[0], IN[1]
3: (PRED[0]) MOV OUT[0], IN[1]
In (2) we set each component of PRED[0] to 1.0 if the corresponding
components of IN[0] are greater than IN[1], and to 0.0 otherwise.
In (3) we write IN[1] to only those components of OUT[0], for which the
respective components of PRED[0] are non-zero.
It seems there are three ways to do conditional execution in TGSI
currently -- predicates, condition codes and IF/THEN/ELSE instructions.
I'd really prefer to have at most two, and in fact preferably just one.
Can you take a look at the three alternatives and figure out if one can
be amputated?
We could kill off the condition codes -- no driver uses that, and it's
easier for us to emulate them with predicates than the other way round.
I think I agree with that. Condition codes are pretty wierd, the only
reason I'd keep them around is that there is the NV GPU4 extension
sitting there as a ready-made definition of a high-end SM4-level
assembly language.
I don't know if Ian plans to introduce a MESA version of the program4
extension that more closely matches his program3 extension (ie
predicates instead of condition codes).
Just FYI: GL_NV_fragment_program uses condition codes but we haven't
supported that extension with Gallium; only the ARB versions.
We could always remove condition codes later, when Ian decides about
their future.
Attached is an updated patch that obsoletes one TGSI token and fixes the
other one, so we can specify swizzles and negation of predicate
registers, per GL_MESA_gpu_program3.
Thanks for comments.
OK, I think I'd prefer to remove condition codes as part of this --
there are no users for them (that we care about), and we don't want
drivers to have to implement both techniques.
If in the future we want condition codes in the mesa state tracker,
we'll have to do the work of converting them to predicates and/or
IF/THEN/ELSE, but it will probably less effort than trying to teach all
the drivers about condition codes.
Can I ask for a third version that removes condition codes?
In terms of drivers supporting this, we probably want another pipe_cap
flag, probably PIPE_CAP_GPU3, to indicate that a particular driver has
GPU3/SM3 support. Can you add that to the interface as well?
Attached third version.
>From d3102528484decff0a6d1effb27545c4d76976d1 Mon Sep 17 00:00:00 2001
From: Michal Krol <mic...@vmware.com>
Date: Fri, 30 Oct 2009 18:19:52 +0000
Subject: [PATCH] gallium: Cleanup predicate and condition code TGSI tokens.
There is little point in having a special TGSI token just to handle
predicate register updates. Remove tgsi_dst_register_ext_predicate token
and instead use a new PREDICATE register file to update predicates.
Actually, the contents of the obsolete token are being moved
to tgsi_instruction_ext_predicate, where they should be
from the very beginning.
Remove the NVIDIA-specific condition code tokens -- nobody uses them
and they can be emulated with predicates if needed.
Introduce PIPE_CAP_GPU3 that indicates whether a driver supports
SM3-level instructions, and in particular predicates.
---
src/gallium/include/pipe/p_defines.h | 1 +
src/gallium/include/pipe/p_shader_tokens.h | 111 ++++------------------------
2 files changed, 17 insertions(+), 95 deletions(-)
diff --git a/src/gallium/include/pipe/p_defines.h
b/src/gallium/include/pipe/p_defines.h
index 52887ea..98cb9e8 100644
--- a/src/gallium/include/pipe/p_defines.h
+++ b/src/gallium/include/pipe/p_defines.h
@@ -333,6 +333,7 @@ enum pipe_transfer_usage {
#define PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS 26
#define PIPE_CAP_TGSI_CONT_SUPPORTED 27
#define PIPE_CAP_BLEND_EQUATION_SEPARATE 28
+#define PIPE_CAP_GPU3 29 /*< GPU3/SM3 supported */
/**
diff --git a/src/gallium/include/pipe/p_shader_tokens.h
b/src/gallium/include/pipe/p_shader_tokens.h
index de338c4..8ec0f9c 100644
--- a/src/gallium/include/pipe/p_shader_tokens.h
+++ b/src/gallium/include/pipe/p_shader_tokens.h
@@ -79,6 +79,7 @@ enum tgsi_file_type {
TGSI_FILE_ADDRESS =6,
TGSI_FILE_IMMEDIATE =7,
TGSI_FILE_LOOP =8,
+ TGSI_FILE_PREDICATE =9,
TGSI_FILE_COUNT /**< how many TGSI_FILE_ types */
};
@@ -319,7 +320,6 @@ struct tgsi_instruction
* instruction, including the instruction word.
*/
-#define TGSI_INSTRUCTION_EXT_TYPE_NV 0
#define TGSI_INSTRUCTION_EXT_TYPE_LABEL 1
#define TGSI_INSTRUCTION_EXT_TYPE_TEXTURE 2
#define TGSI_INSTRUCTION_EXT_TYPE_PREDICATE 3
@@ -332,9 +332,6 @@ struct tgsi_instruction_ext
};
/*
- * If tgsi_instruction_ext::Type is TGSI_INSTRUCTION_EXT_TYPE_NV, it should
- * be cast to tgsi_instruction_ext_nv.
- *
* If tgsi_instruction_ext::Type is TGSI_INSTRUCTION_EXT_TYPE_LABEL, it
* should be cast to tgsi_instruction_ext_label.
*
@@ -348,56 +345,11 @@ struct tgsi_instruction_ext
* follows.
*/
-#define TGSI_PRECISION_DEFAULT 0
-#define TGSI_PRECISION_FLOAT32 1
-#define TGSI_PRECISION_FLOAT16 2
-#define TGSI_PRECISION_FIXED12 3
-
-#define TGSI_CC_GT 0
-#define TGSI_CC_EQ 1
-#define TGSI_CC_LT 2
-#define TGSI_CC_GE 3
-#define TGSI_CC_LE 4
-#define TGSI_CC_NE 5
-#define TGSI_CC_TR 6
-#define TGSI_CC_FL 7
-
#define TGSI_SWIZZLE_X 0
#define TGSI_SWIZZLE_Y 1
#define TGSI_SWIZZLE_Z 2
#define TGSI_SWIZZLE_W 3
-/**
- * Precision controls the precision at which the operation should be executed.
- *
- * CondDstUpdate enables condition code register writes. When this field is
- * TRUE, CondDstIndex specifies the index of the condition code register to
- * update.
- *
- * CondFlowEnable enables conditional execution of the operation. When this
- * field is TRUE, CondFlowIndex specifies the index of the condition code
- * register to test against CondMask with component swizzle controled by
- * CondSwizzleX, CondSwizzleY, CondSwizzleZ and CondSwizzleW. If the test
fails,
- * the operation is not executed.
- */
-
-struct tgsi_instruction_ext_nv
-{
- unsigned Type : 4; /* TGSI_INSTRUCTION_EXT_TYPE_NV */
- unsigned Precision : 4; /* TGSI_PRECISION_ */
- unsigned CondDstIndex : 4; /* UINT */
- unsigned CondFlowIndex : 4; /* UINT */
- unsigned CondMask : 4; /* TGSI_CC_ */
- unsigned CondSwizzleX : 2; /* TGSI_SWIZZLE_ */
- unsigned CondSwizzleY : 2; /* TGSI_SWIZZLE_ */
- unsigned CondSwizzleZ : 2; /* TGSI_SWIZZLE_ */
- unsigned CondSwizzleW : 2; /* TGSI_SWIZZLE_ */
- unsigned CondDstUpdate : 1; /* BOOL */
- unsigned CondFlowEnable : 1; /* BOOL */
- unsigned Padding : 1;
- unsigned Extended : 1; /* BOOL */
-};
-
struct tgsi_instruction_ext_label
{
unsigned Type : 4; /* TGSI_INSTRUCTION_EXT_TYPE_LABEL */
@@ -425,13 +377,23 @@ struct tgsi_instruction_ext_texture
unsigned Extended : 1; /* BOOL */
};
+/*
+ * Currently, the following constraints apply.
+ *
+ * - PredSwizzleXYZW is either set to identity or replicate.
+ * - PredSrcIndex is 0.
+ */
struct tgsi_instruction_ext_predicate
{
- unsigned Type : 4; /* TGSI_INSTRUCTION_EXT_TYPE_PREDICATE */
- unsigned PredDstIndex : 4; /* UINT */
- unsigned PredWriteMask : 4; /* TGSI_WRITEMASK_ */
- unsigned Padding : 19;
- unsigned Extended : 1; /* BOOL */
+ unsigned Type : 4; /* TGSI_INSTRUCTION_EXT_TYPE_PREDICATE */
+ unsigned PredSwizzleX : 2; /* TGSI_SWIZZLE_ */
+ unsigned PredSwizzleY : 2; /* TGSI_SWIZZLE_ */
+ unsigned PredSwizzleZ : 2; /* TGSI_SWIZZLE_ */
+ unsigned PredSwizzleW : 2; /* TGSI_SWIZZLE_ */
+ unsigned PredSrcIndex : 4; /* UINT */
+ unsigned Negate : 1; /* BOOL */
+ unsigned Padding : 14;
+ unsigned Extended : 1; /* BOOL */
};
/**
@@ -546,9 +508,7 @@ struct tgsi_dst_register
* Then, if tgsi_dst_register::Indirect is TRUE, tgsi_src_register follows.
*/
-#define TGSI_DST_REGISTER_EXT_TYPE_CONDCODE 0
#define TGSI_DST_REGISTER_EXT_TYPE_MODULATE 1
-#define TGSI_DST_REGISTER_EXT_TYPE_PREDICATE 2
struct tgsi_dst_register_ext
{
@@ -560,30 +520,12 @@ struct tgsi_dst_register_ext
/**
* Extra destination register modifiers
*
- * If tgsi_dst_register_ext::Type is TGSI_DST_REGISTER_EXT_TYPE_CONDCODE,
- * it should be cast to tgsi_dst_register_ext_condcode.
- *
* If tgsi_dst_register_ext::Type is TGSI_DST_REGISTER_EXT_TYPE_MODULATE,
* it should be cast to tgsi_dst_register_ext_modulate.
*
- * If tgsi_dst_register_ext::Type is TGSI_DST_REGISTER_EXT_TYPE_PREDICATE,
- * it should be cast to tgsi_dst_register_ext_predicate.
- *
* If tgsi_dst_register_ext::Extended is TRUE, another tgsi_dst_register_ext
* follows.
*/
-struct tgsi_dst_register_ext_concode
-{
- unsigned Type : 4; /* TGSI_DST_REGISTER_EXT_TYPE_CONDCODE */
- unsigned CondMask : 4; /* TGSI_CC_ */
- unsigned CondSwizzleX : 2; /* TGSI_SWIZZLE_ */
- unsigned CondSwizzleY : 2; /* TGSI_SWIZZLE_ */
- unsigned CondSwizzleZ : 2; /* TGSI_SWIZZLE_ */
- unsigned CondSwizzleW : 2; /* TGSI_SWIZZLE_ */
- unsigned CondSrcIndex : 4; /* UINT */
- unsigned Padding : 11;
- unsigned Extended : 1; /* BOOL */
-};
#define TGSI_MODULATE_1X 0
#define TGSI_MODULATE_2X 1
@@ -602,27 +544,6 @@ struct tgsi_dst_register_ext_modulate
unsigned Extended : 1; /* BOOL */
};
-/*
- * Currently, the following constraints apply.
- *
- * - PredSwizzleXYZW is either set to identity or replicate.
- * - PredSrcIndex is 0.
- */
-
-struct tgsi_dst_register_ext_predicate
-{
- unsigned Type : 4; /* TGSI_DST_REGISTER_EXT_TYPE_PREDICATE */
- unsigned PredSwizzleX : 2; /* TGSI_SWIZZLE_ */
- unsigned PredSwizzleY : 2; /* TGSI_SWIZZLE_ */
- unsigned PredSwizzleZ : 2; /* TGSI_SWIZZLE_ */
- unsigned PredSwizzleW : 2; /* TGSI_SWIZZLE_ */
- unsigned PredSrcIndex : 4; /* UINT */
- unsigned Negate : 1; /* BOOL */
- unsigned Padding : 14;
- unsigned Extended : 1; /* BOOL */
-};
-
-
#ifdef __cplusplus
}
#endif
--
1.6.4.msysgit.0
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