On Mon, 2010-01-04 at 09:47 -0800, Brian Paul wrote:
> Christoph Bumiller wrote:
> > On 31.12.2009 12:05, Keith Whitwell wrote:
> >> Luca,
> >>
> >> This is an impressive body of work.  I want to give Jose a chance to
> >> review the EGL/GLX extensions before pushing, but in the meantime I hope
> >> it's ok if I make a couple of quick suggestions/requests:
> >>
> >> Firstly, we're going to be evolving the TGSI instruction set a fair bit
> >> over the coming months to catch up with newer GLSL versions, CL, etc.
> > At that point I'd like to ask if, when all the nice memory spaces
> > are introduced to TGSI, these nasty indirect accesses to TEMP
> > will go away.
> > 
> > They are really painful to implement because you cannot index
> > registers on nv50+ and thus we'd have to regard TEMP as memory.
> > And since there is no information in the TGSI tokens about
> > what TEMPs constitute an array, we'd have to store and load
> > all of them, which would be quite costly.
> > 
> > So I was hoping that, optionally (older cards without actual memory
> > won't like it I suppose), the compiler can just generate the
> > appropriate stores and loads.
> 
> One possibility is to define a new "register" file such as "MEM" that 
> would be just like TEMP but would be used for indirectly addressed r/w 
> storage (arrays).
> 
> This would give optimizers more information about how storage is used 
> and allow for better register allocation.  Some of the program 
> optimization code in Mesa currently gives up if it discovers that temp 
> registers are indirectly addressed.

I think this is pretty much equivalent to restricting indexing to
defined ranges of indexable temporaries.  I'm guessing the way that
would work is we'd say something like:

DECL OUT[0]
DECL ADDR[0]
DECL INDEXABLE_TEMP V[2][0..10]

# Populate temporaries
MOV V[2][0], FOO
MOV V[2][1], BAR

# Extract something with dynamic indexing:
MOV OUT[0], V[2][ADDR[0].x]
END

I think that's pretty much the same as you're proposing.

Keith


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