> If you get this patch in, then you'll still have to fight with every
> other state tracker that doesn't prettify their TGSI. It would be a
> much better approach to attempt to RE the routing tables.
I don't think there any users of the Gallium interface that need more
than 8 vertex outputs/fragment inputs and don't use sequential values
starting at 0, except the GLSL linker without this patch.
ARB_fragment_program and ARB_vertex_program is limited to texcoord
slots, and Mesa should advertise only 8 of them.
Also users of this interface will likely only use as many as they
need, sequentially.
Vega, xorg seem to only use up to 2 slots.
g3dvl up to 8 (starting from 0, of course).
Cards with less than 8 slots may sometimes still have problems, but
such cards will probably be DX8 cards that don't work anyway.
Furthermore, even if you can route things, usings vertex outputs and
fragment inputs with lower indices may be more efficient anyway.
As for REing the tables, it may not be possible.
This is the code that apparently sets them up right now:
/* vtxprog output routing */
so_method(so, screen->curie, 0x1fc4, 1);
so_data (so, 0x06144321);
so_method(so, screen->curie, 0x1fc8, 2);
so_data (so, 0xedcba987);
so_data (so, 0x00000021);
so_method(so, screen->curie, 0x1fd0, 1);
so_data (so, 0x00171615);
so_method(so, screen->curie, 0x1fd4, 1);
so_data (so, 0x001b1a19);
This makes me think that only 4 bits might be used for the values
(look at the arithmetic progressions of 4-bit values), so that there
is a limit of 16 vertex output/fragment inputs.
If GLSL starts at index 10, we are still in trouble because less than
8 varyings will be available.
Also leaving vertex outputs/fragment inputs unused by starting at high
values may be bad for performance even if supported, as it may lead to
a bigger register file and thus less simultaneous GPU threads running.
In other words, having GLSL start at index 10 is easily avoided, and
causes problems nothing else causes, so why not just stop doing that?
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