Den 12/9/2017 11:25, skrev Ywe Cærlyn:
Den 12/9/2017 05:21, skrev gwes:
On 12/07/17 07:31, Ywe Cærlyn wrote:
I saw AMDs "semi-custom" CPU email form and told them that I wanted
a CPU, that is clockspeed oriented, not cores (might aswell be
singlecore with high HZ), that could be using several instruction
macros (combining two or three), for max virtual clockspeed, and an
optimizing compiler for this. And wondered if an additional poweroff
mode could be added to the binary stream of 1 0, so that bitwise i/o
and cpu scheduling could be done.
If one could get the virtual clockspeed up to 12ghz, I think no
regular user would ever use more than a single core. And it´d be a
megahit.
Fixing all inefficiency hardware wise. Philosophically aswell.
Peaceful Salutations.
CPU clock speed != performance.
Factor in:
main memory: latency, bus width, and access/cycle time.
caches: levels, speeds, sizes, widths
CPU access patterns interacting with the above
clocks per instruction: average, best case, worst case
cost or even feasibility of super high CPU clocks
propagation time of signals across chips
A very fast CPU clock on a CPU with very low clocks-per-instruction
a small die and a huge memory matching speed == the RISC ideal
Even RISC with floating point hardware, for instance, often takes
many cycles.
Adding cores is often seen as the best way of increasing
>system< performance significantly at the lowest cost.
geoff steckel
Risc = reduced instruction set. This would be the other way I guess...
:) And really keeping a whole bunch of compatibility. To not speak of
even windows running near hardware realtime.
Peaceful Salutations.
So what you could do is contact AMD aswell through the CUSTOM CPU
http://www.amd.com/en-us/solutions/semi-custom page
and say you want this cpu. I have called it a "Grand" cpu, and also
updated my banner on my youtube page with it.
Check it out for a taste of potentially the next internet - Ultranet.
https://www.youtube.com/channel/UCR3gmLVjHS5A702wo4bol_Q
Peaceful Salutations.
