Hi, There are numerous tutorials, book on line.. That can be used to start with. Maybe, it could be easier to recommand reading some on these files (linking them on the wiki) and then, create a coding style guide. What do you think?
Here are some links that can be interesting: Asic ... The book (Verilog Chapter 11): http://www.ge.infn.it/~pratolo/verilog/VerilogTutorial.pdf Doulos: http://www.doulos.com/knowhow/verilog_designers_guide/ Sébastien Selon Vinicius Santos <[EMAIL PROTECTED]>: > On 6/13/06, Timothy Miller <[EMAIL PROTECTED]> wrote: > > You can also have arrays of wires (in most dialects of Verilog): > > > > wire [7:0] k [0:20]; // An array of twenty-one 8-bit busses > How about acessing the array? The same way we declare it? Like: > wire a = [5]k[11]; // asign the (5+1)th bit of the (11+1)th bus to a > wire [7:0] b= k[2]; // asign the (2+1)th bus to the b 8-bit bus > wire [0:20] c = [2] k; // asign the third bit of every bus to the 21-bit bus > > Is that correctly? > _______________________________________________ > Open-graphics mailing list > [email protected] > http://lists.duskglow.com/mailman/listinfo/open-graphics > List service provided by Duskglow Consulting, LLC (www.duskglow.com) > --Sébastien http://tetsuo3.free.fr _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
