On 6/26/06, Ryan Osial <[EMAIL PROTECTED]> wrote:
Something to note when we start doing synthesis, the XP6 should have a a 33 MHz constraint on the clock. Otherwise the timing reports show negative slack because the synthesizer tries to go for the highest frequency
Negative slack means it's too slow. You generally can't rely on the optimizers in FPGA synthesis tools to help much with that, although the P&R tools can place things carefully. If the slack is positive, that means your design is faster than it needs to be, and that's okay. _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
