This is an automated email from Gerrit.
Paul Fertser (fercer...@gmail.com) just uploaded a new patch set to Gerrit,
which you can find at http://openocd.zylin.com/2583
-- gerrit
commit a0cfba3ab10cbc674edd2c16652c8fe524fb830a
Author: Paul Fertser <fercer...@gmail.com>
Date: Sun Mar 8 11:50:03 2015 +0300
target: reexamine the target after reset deasserted
After executing reset by whatever means, the debug logic in target
might be in the same state as after power-on-reset (and I'd say it's
valid to connect SRST to a circuit that physically power-cycles the
target, provided srst_pulls_trst option is used).
This patch should help with "reset halt" on e.g. SAM4L, and removes
the relevant (and likely incomplete) hack from cortex_m.
Reexamining a target shouldn't have any adverse effects in any case.
Change-Id: Ib2dc30ba379a86e94b1a3452d2f0409088bc2db5
Signed-off-by: Paul Fertser <fercer...@gmail.com>
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index d3b8f4e..53913d0 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -1066,19 +1066,6 @@ static int cortex_m_assert_reset(struct target *target)
"handler to reset any peripherals or configure
hardware srst support.");
}
- /*
- SAM4L needs to execute security initalization
- startup sequence before AP access would be enabled.
- During the intialization CDBGPWRUPACK is pulled low and we
- need to wait for it to be set to 1 again.
- */
- retval = dap_dp_poll_register(swjdp, DP_CTRL_STAT,
- CDBGPWRUPACK, CDBGPWRUPACK, 100);
- if (retval != ERROR_OK) {
- LOG_ERROR("Failed waitnig for CDBGPWRUPACK");
- return ERROR_FAIL;
- }
-
{
/* I do not know why this is necessary, but it
* fixes strange effects (step/resume cause NMI
diff --git a/src/target/target.c b/src/target/target.c
index c87c889..2a8691e 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -4782,8 +4782,14 @@ static int jim_target_reset(Jim_Interp *interp, int
argc, Jim_Obj *const *argv)
/* do the assert */
if (n->value == NVP_ASSERT)
e = target->type->assert_reset(target);
- else
+ else {
e = target->type->deassert_reset(target);
+
+ if (e == ERROR_OK) {
+ target_reset_examined(target);
+ e = target_examine_one(target);
+ }
+ }
return (e == ERROR_OK) ? JIM_OK : JIM_ERR;
}
--
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