Yes, I used the default setting of 8000. However I think I have now figured out where the WAITs came from, and it’s not because the clock frequency was inherently too high. Rather, it is because the reset-init handler for the chip does the adapter_khz change. So on a two-chip chain, after the first chip runs its reset-init handler, the adapter goes up to 8000, then the second chip, which is not running on PLL yet, runs its reset-init handler with adapter already at 8000 and issues WAITs in there. On March 13, 2018 2:02:37 PM PDT, Tomas Vanek via OpenOCD-devel <openocd-devel@lists.sourceforge.net> wrote: >Did you use 'adapter_khz 8000' for the last test? >I'm afraid that 8 MHz is too much (WAITs during reset-init). -- Christopher Head
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