On 27 March 2018 at 00:15:39, Tim Newsome (t...@sifive.com) wrote: > On Mon, Mar 26, 2018 at 1:30 AM, Matthias Welwarsky < > matthias.welwar...@sysgo.com> wrote:
> Also, if this patch is genuinely useful, why do ARM targets break when it's > > enabled? > > > That’s a good question, and I only have a partial answer. > ... But given that gdb behaves > that way for ARM targets, it seems best not to report errors to it unless > we know it can handle them with grace. This patch greatly helps OpenOCD distributions that already include the RISC-V patches. When I first merged the RISC-V patches into GNU MCU Eclipse OpenOCD, I could no longer debug ARM targets, and I had to manually disable the RISC-V patches. Each time I try to merge the RISC-V patches I get conflicts and I need to manually solve them. The current patch, as it is, is completely harmless for all existing targets that do not enable extra error processing. But it would really help GNU MCU Eclipse OpenOCD and all other distributions that need RISC-V functionality. And it would be the first step towards upstreaming the full RISC-V fork, which, as far as I remember, requires no other changes to the common code, and can be accepted as is. I would highly appreciate merging this first patch. Thank you, Liviu ------------------------------------------------------------------------------ Check out the vibrant tech community on one of the world's most engaging tech sites, Slashdot.org! http://sdm.link/slashdot _______________________________________________ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
