It would be quite helpful to include your cfg file ... as the
"Warn : no flash bank found for address 0x90000000"
strongly suggests that the qspi flash bank hasn't been set up (properly).
As long as 'flash probe 2' doesn't show the correct id of you flash chip(s),
there ist no hope the qspi driver is going to work properly (note that 'flash
read_bank' and other read accesses do *NOT* involve the qspi flash driver at
all --- that's done via ordinary mem read accesses in memory mapped mode).
An example for H7 is
http://openocd.zylin.com/#/c/4321/5/tcl/board/nucleo-h743zi.cfg. To generate
the port setup, please use the supplied 'contrib/stm32_gpio_conf.pl' script.
The comments at the beginning show suitable parameters e. g. for that nucleo
board.
---
** [tickets:#211] Enable break points on QSPI debugging + OpenOCD**
**Status:** new
**Milestone:** 0.9.0
**Created:** Thu Nov 29, 2018 07:45 AM UTC by shaalik
**Last Updated:** Mon Dec 10, 2018 03:04 PM UTC
**Owner:** nobody
Hi,
We were able to debug from QSPI NOR flash on custom stm32H7 + NOR board, and
possible to do step in and step over. However it is not possible to set or
clear break points on run time. How can we enable the break points on QSPI NOR
flash debugging
---
Sent from sourceforge.net because [email protected] is
subscribed to https://sourceforge.net/p/openocd/tickets/
To unsubscribe from further messages, a project admin can change settings at
https://sourceforge.net/p/openocd/admin/tickets/options. Or, if this is a
mailing list, you can unsubscribe from the mailing list.
_______________________________________________
OpenOCD-devel mailing list
[email protected]
https://lists.sourceforge.net/lists/listinfo/openocd-devel