Hi, as Tommy pointed out, one way to accomplish it is to use a RTL model of a target processor. It can be simulated on a workstation (using an enterprise RTL simulator or free Verilator tool). Then OpenOCD interfaced with this running simulation - e.g. via jtag_vpi interface.
Another option is to use an instruction set simulator (e.g Spike for RISC-V) and connect OpenOCD to it again via a TCP-based JTAG transport that the simulator supports - e.g jtag_vpi or remote_bitbang. Jan On Fri, Apr 3, 2020 at 10:11 AM Liviu Ionescu <i...@livius.net> wrote: > Hi, > > I would like to add some automated tests, running on a CI server (like > Travis), to validate the xPack OpenOCD binaries on various platforms. > > Obviously in this scenario I cannot use any hardware probe. > > Apart from asking OpenOCD for its version to see if the program starts, > can you recommend any other testing procedures? Are there any internal test > commands available? Any simulated interfaces? Other things like this that > can be used in a standalone test? > > > Thank you, > > Liviu > > > > > _______________________________________________ > OpenOCD-devel mailing list > OpenOCD-devel@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/openocd-devel >
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