Kristof,
The CMSIS-DAP related bits in that file should be fine. However, there are other
things in the file that are specific to the ARM, e.g, flash and PLL bits. So you
can't
use the file as-is. You'll have to do some modifications for the RISCV (if any).
As far as combining it, it's just a matter of hooking up the CMSIS-DAP block
interface
into the right places in the RISCV block in the Verilog.
Regards,
Jim
==============
On 4/29/20 10:34 AM, kristof.mul...@telenet.be wrote:
Hi @jmn
I just got the following reply from Reuben Townsend from GigaDevice:
/ Hi Kristof, the GD-LINK uses the CMSIS-DAP interface/
/ and for the GD32E230 MCU, you can use the stm32f0x.cfg/
/ configuration file./
/ Attached is a script you could use./
It didn't work on my computer. I'll ask him what to do for the Risc-V board.
Anyway, the script he sent me is this one:
/ interface cmsis-dap/
/ transport select swd/
/ source [find target/stm32f0x.cfg]/
What surprises me is that the GD-Link is based on cmsis-dap - which is an ARM
Cortex standard. Not sure how they combine that with a Risc-V processor. For
the datasheet on this Risc-V processor, see:
https://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=1&ved=2ahUKEwja5ffQ-o3pAhX1JMUKHR90DC4QFjAAegQIDRAB&url=https%3A%2F%2Fdl.sipeed.com%2FLONGAN%2FNano%2FDOC%2FGD32VF103_Datasheet_Rev1.0.pdf&usg=AOvVaw3vDRLt14BC1Msb24ENRqRL
Kind regards,
Kristof
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