This is an automated email from Gerrit. Tarek BOCHKATI ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/5860
-- gerrit commit 5f07bd04fda5cd5dc3a906d4011f8d10ef8b4a21 Author: Tarek BOCHKATI <[email protected]> Date: Wed Oct 14 12:46:34 2020 +0100 aarch64: handle semihosting in aarch32 state [RFC] Change-Id: I0e868d617db126a2b258e27b11979b75b5bb72f5 Signed-off-by: Tarek BOCHKATI <[email protected]> diff --git a/src/target/arm_semihosting.c b/src/target/arm_semihosting.c index 61f1e78..90d1203 100644 --- a/src/target/arm_semihosting.c +++ b/src/target/arm_semihosting.c @@ -275,6 +275,16 @@ int arm_semihosting(struct target *target, int *retval) if (target->debug_reason != DBG_REASON_BREAKPOINT) return 0; + /* According to ARM Semihosting for AArch32 and AArch64: + * The HLT encodings are new in version 2.0 of the semihosting specification. + * Where possible, have semihosting callers continue to use the previously + * existing trap instructions to ensure compatibility with legacy semihosting + * implementations. + * These trap instructions are HLT for A64, SVC on A+R profile A32 or T32, + * and BKPT on M profile. + * However, it is necessary to change from SVC to HLT instructions to support + * AArch32 semihosting properly in a mixed AArch32/AArch64 system. */ + if (arm->core_state == ARM_STATE_AARCH64) { uint32_t insn = 0; r = arm->pc; @@ -284,9 +294,37 @@ int arm_semihosting(struct target *target, int *retval) if (*retval != ERROR_OK) return 1; - /* bkpt 0xAB */ + /* HLT 0xF000 */ if (insn != 0xD45E0000) return 0; + } else if (arm->core_state == ARM_STATE_ARM) { + uint32_t insn = 0; + + r = arm->pc; + pc = buf_get_u32(r->value, 0, 32); + + if (pc & 1 == 0) { + /* check for HLT 0xF000 (A32 instruction) */ + *retval = target_read_u32(target, pc, &insn); + + if (*retval != ERROR_OK) + return 1; + + /* HLT 0xF000*/ + if (insn != 0xE10F0070) + return 0; + } else { + /* check for HLT 0x3C (T32 instruction) */ + pc &= ~1; + *retval = target_read_u16(target, pc, &insn); + + if (*retval != ERROR_OK) + return 1; + + /* HLT 0x3C*/ + if (insn != 0xBABC) + return 0; + } } else return 1; } else { diff --git a/src/target/armv8.c b/src/target/armv8.c index ab60cd3..700c1dc 100644 --- a/src/target/armv8.c +++ b/src/target/armv8.c @@ -1098,13 +1098,6 @@ int armv8_handle_cache_info_command(struct command_invocation *cmd, static int armv8_setup_semihosting(struct target *target, int enable) { - struct arm *arm = target_to_arm(target); - - if (arm->core_state != ARM_STATE_AARCH64) { - LOG_ERROR("semihosting only supported in AArch64 state\n"); - return ERROR_FAIL; - } - return ERROR_OK; } -- _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
