On Sunday 23 August 2009, Dirk Behme wrote:
> >> http://lists.berlios.de/pipermail/openocd-development/2009-June/008256.html
Better to merge this version, if any ...
---
src/jtag/core.c | 8 ++++++++
1 file changed, 8 insertions(+)
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -469,6 +469,14 @@ void jtag_add_tlr(void)
{
jtag_prelude(TAP_RESET);
jtag_set_error(interface_jtag_add_tlr());
+
+ /*
+ * Add a bunch of clocks after TLR entry to force SWD reset (newer
+ * ARM cores; just in case, ~50 cycles), switch on ICEpick power
+ * domains (for some TI parts, ~100 cycles), etc
+ */
+ jtag_set_error(interface_jtag_add_runtest(100, TAP_RESET));
+
jtag_call_event_callbacks(JTAG_TRST_ASSERTED);
}
---
src/jtag/core.c | 8 ++++++++
1 file changed, 8 insertions(+)
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -469,6 +469,14 @@ void jtag_add_tlr(void)
{
jtag_prelude(TAP_RESET);
jtag_set_error(interface_jtag_add_tlr());
+
+ /*
+ * Add a bunch of clocks after TLR entry to force SWD reset (newer
+ * ARM cores; just in case, ~50 cycles), switch on ICEpick power
+ * domains (for some TI parts, ~100 cycles), etc
+ */
+ jtag_set_error(interface_jtag_add_runtest(100, TAP_RESET));
+
jtag_call_event_callbacks(JTAG_TRST_ASSERTED);
}
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