On Fri, Mar 25, 2011 at 11:55 AM, Andrew Lyon <andrew.l...@gmail.com> wrote: > Drasko, > > I read somewhere that some bigendian mips systems still have little > endian tap This is true. I am not MIPS expert, I am going through EJTAG manual right now to find confirmations...
> , perhaps that explains why on my system data loaded using > fastdata is ok (it is aware of endianness), but everything else is > bitswapped because my board does not have the little endian tap. I would say that next thing is happening - every call to mips_m4k_write_memory() is wrong because it do not handle endianess - it misses David Claffey's patch, as we discussed in this thread : http://www.mail-archive.com/openocd-development@lists.berlios.de/msg15770.html However, mips32_pracc_fastdata_xfer() has a piece of code that threat the endianess, and when it suceeds it's OK. My problem is that mips32_pracc_fastdata_xfer() did not work for me and was always filing to simple mips_m4k_write_memory(). This is discussed in more details here : http://www.mail-archive.com/openocd-development@lists.berlios.de/msg15770.html But mips32_pracc_fastdata_xfer() succeeds in your case, so does for Oliver. I'll have to investigate some more and post my observations. I see some problems in mips32_pracc_fastdata_xfer() implementation thet are not consistent to EJTAG specification by my opinion, and when I correct these it starts working for me. My problem now is that it works for all of you without changes, so maybe I am seeing something wrong. Best regards, Drasko _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
