These devices (based on xrx200/VR9) replace the internal dwc2 USB2
with an external renesas USB3 controller, attached via PCIe.
The whole wireless hardware is offloaded to a secondary SoC with
an ethernet connection from the built-in switch.
This DTS describes the GSWIP in DSA mode, and defaults to UBI
for the major part of the NAND flash.
Signed-off-by: Torsten Duwe <d...@lst.de>
---
.../boot/dts/lantiq/vr9_avm_fritzx490.dtsi | 240 ++++++++++++++++++
1 file changed, 240 insertions(+)
create mode 100644
target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritzx490.dtsi
diff --git
a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritzx490.dtsi
b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritzx490.dtsi
new file mode 100644
index 0000000000..057bcf6b93
--- /dev/null
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritzx490.dtsi
@@ -0,0 +1,240 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "vr9.dtsi"
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/mips/lantiq_rcu_gphy.h>
+
+/ {
+ compatible = "avm,fritzx490", "lantiq,xway", "lantiq,vr9";
+
+ chosen {
+ bootargs = "console=ttyLTQ0,115200";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x10000000>;
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ poll-interval = <100>;
+
+ wps {
+ // boxes with (unsupported) telephony HW have DECT here
+ label = "wps";
+ gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_WLAN>;
+ };
+
+ wifi {
+ label = "wifi";
+ gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RFKILL>;
+ };
+ };
+
+ gpio-export {
+ compatible = "gpio-export";
+
+ gpio_wasp_reset {
+ gpio-export,name = "wasp:reset";
+ gpio-export,output = <1>;
+ gpios = <&gpio 34 GPIO_ACTIVE_HIGH>;
+ };
+
+ gpio_wasp_wakeup {
+ gpio-export,name = "wasp:wakeup";
+ gpio-export,output = <1>;
+ gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+ð0 {
+ mtd-mac-address = <&urlader 0xcc>;
+ mtd-mac-address-increment = <1>;
+};
+
+&gphy0 {
+ lantiq,gphy-mode = <GPHY_MODE_GE>;
+};
+
+&gphy1 {
+ lantiq,gphy-mode = <GPHY_MODE_GE>;
+};
+
+&gpio {
+ pinctrl-names = "default";
+ pinctrl-0 = <&state_default>;
+ gpio-ranges = <&gpio 0 0 56>;
+
+ state_default: pinmux {
+ phy-rst {
+ lantiq,pins = "io32", "io44";
+ lantiq,pull = <0>;
+ lantiq,open-drain;
+ lantiq,output = <1>;
+ };
+
+ pcie-rst {
+ lantiq,pins = "io21";
+ lantiq,open-drain;
+ lantiq,output = <1>;
+ };
+ };
+
+ pcie-rst-dev {
+ gpio-hog;
+ line-name = "pcie-rst-dev";
+ gpios = <22 GPIO_ACTIVE_LOW>;
+ output-low;
+ };
+
+ usb-vbus {
+ gpio-hog;
+ line-name = "usb-vbus";
+ gpios = <14 GPIO_ACTIVE_HIGH>;
+ output-high;
+ };
+};
+
+&gswip {
+ pinctrl-0 = <&mdio_pins>;
+ pinctrl-names = "default";
+};
+
+&gswip_mdio {
+ phy0: ethernet-phy@0 {
+ reg = <0x00>;
+ reset-gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
+ };
+
+ phy1: ethernet-phy@1 {
+ reg = <0x01>;
+ reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+ };
+
+ phy11: ethernet-phy@11 {
+ reg = <0x11>;
+ };
+
+ phy13: ethernet-phy@13 {
+ reg = <0x13>;
+ };
+};
+
+&gswip_ports {
+ port@0 {
+ reg = <0>;
+ label = "lan3";
+ phy-mode = "rgmii-rxid";
+ phy-handle = <&phy0>;
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan4";
+ phy-mode = "rgmii-rxid";
+ phy-handle = <&phy1>;
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ phy-mode = "internal";
+ phy-handle = <&phy11>;
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "lan1";
+ phy-mode = "internal";
+ phy-handle = <&phy13>;
+ };
+
+ // internal port to wasp/owl WIFI system
+ port@5 {
+ reg = <5>;
+ label = "lan5";
+ phy-mode = "rgmii";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+};
+
+&localbus {
+ flash1: flash@1 {
+ compatible = "lantiq,nand-xway";
+ bank-width = <2>;
+ reg = <0x1 0x0 0x2000000>;
+
+ nand-ecc-engine = <&flash1>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "kernel";
+ reg = <0x0 0x400000>;
+ };
+
+ partition@400000 {
+ label = "ubi";
+ reg = <0x400000 0x1fc00000>;
+ };
+ };
+ };
+};
+
+
+&pci0 {
+ status = "okay";
+};
+
+&pcie0 {
+ status = "okay";
+
+ gpio-reset = <&gpio 21 GPIO_ACTIVE_LOW>;
+ lantiq,switch-pcie-endianess;
+};
+
+&spi {
+ status = "okay";
+
+ flash@4 {
+ compatible = "jedec,spi-nor";
+ reg = <4>;
+ spi-max-frequency = <10000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ urlader: partition@0 {
+ reg = <0x0 0x40000>;
+ label = "urlader";
+ read-only;
+ };
+
+ partition@40000 {
+ reg = <0x40000 0x60000>;
+ label = "tffs (1)";
+ read-only;
+ };
+
+ partition@a0000 {
+ reg = <0xa0000 0x60000>;
+ label = "tffs (2)";
+ read-only;
+ };
+ };
+ };
+};
--
2.35.3
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