tastingfan tastingfan wrote: > > Jim Walker <[EMAIL PROTECTED]> ：I will go a step further and suggest that the > input signal should be > 3.3V. Not only do you need to turn on the bottom N-channel device, you > must also turn off the upper P-channel device. The signal must be closer > to the rail than the threshold voltage which is frequently quite low. > CMOS inverters are not normally used as voltage amplifiers but rather as > buffers (current gain) or to reverse the polarity of the signal. > > I hope that helps. > > Jim Walker > Walker Power Design, Inc. > > > ____________________________________________________________ > You are subscribed to the PEDA discussion forum > > To Post messages: > mailto:[email protected] > > Unsubscribe and Other Options: > http://techservinc.com/mailman/listinfo/peda_techservinc.com > > Browse or Search Old Archives (2001-2004): > http://www.mail-archive.com/[email protected] > > Browse or Search Current Archives (2004-Current): > http://www.mail-archive.com/[email protected] > > > Hi, > > > > Even I increase the input to 3.3V, the output drops only to 2.7V. Can you > give it a try in your computer? It’s not difficult at all! > > > > Best Regards > > Tasting_Fan > > > > --------------------------------- > DO YOU YAHOO!? > 雅虎免费G邮箱－中国第一绝无垃圾邮件骚扰超大邮箱 > > ____________________________________________________________ > You are subscribed to the PEDA discussion forum > > To Post messages: > mailto:[email protected] > > Unsubscribe and Other Options: > http://techservinc.com/mailman/listinfo/peda_techservinc.com > > Browse or Search Old Archives (2001-2004): > http://www.mail-archive.com/[email protected] > > Browse or Search Current Archives (2004-Current): > http://www.mail-archive.com/[email protected] > > I do not have the Protel simulation package. (I use PSpice which is now part of Orcad.) Therefore, I don't think that it would help you for me to simulate the circuit. It would probably be a different circuit on a different simulator. However, I note that your output pulls down about a diode drop (0.6V)from the +3.3V rail. That suggests that the upper transistor is upside down. That is, its intrinsic diode is forward biased when the bottom transistor is turned on. Is the upper transistor P-channel and is its source connected to +3.3V?
Jim Walker Walker Power Design, Inc. ____________________________________________________________ You are subscribed to the PEDA discussion forum To Post messages: mailto:[email protected] Unsubscribe and Other Options: http://techservinc.com/mailman/listinfo/peda_techservinc.com Browse or Search Old Archives (2001-2004): http://www.mail-archive.com/[email protected] Browse or Search Current Archives (2004-Current): http://www.mail-archive.com/[email protected]
