Third manner/variation (still a manual edit) but a bit more manual for us 
control freaks.

        Use the (right-click) Select Connected Copper for each trace 
individually and globally assign the netname to the selected traces. This gives 
you the control over which traces are net renamed and you can appropriately 
deal with connections that may no longer be needed or don't connect where they 
should.

        Where you have a net connection where some trace segments still have 
the netname assigned (traces that continue past a previous pin), you can use 
that trace segment to do the global net assignment to the selected segments and 
not even have to enter the netname manually, just check the netname box while 
doing the global edit.

Sincerely,
Brad Velander
Senior PCB Designer
Northern Airborne Technology
#14 - 1925 Kirschner Road,
Kelowna, BC, V1Y 4N7.
tel (250) 763-2329 ext. 225
fax (250) 762-3374


-----Original Message-----
From: Abd ul-Rahman Lomax [mailto:[EMAIL PROTECTED]
Sent: Friday, May 12, 2006 8:06 AM
To: Protel EDA Discussion List
Subject: Re: [PEDA] after Update ---> net-names lost


At 08:53 AM 5/12/2006, Jim McGrath wrote:
>It appears you need to "update free primitives from compomemt pads".
>Go To Design, Netlist Manager, Menu and select "update free primitives
>from compomemt pads".

Just to make it explicit, there are only two ways designed into 
Protel 99SE (and, I think, later versions as well) to assign nets to 
primitives.

One is directly, through edits, individual or global or similar. 
This, obviously, will not be satisfactory.

The other is Update Free Primitives from Component Pads, as described 
by Mr. McGrath. This command essentially clears out all Free 
Primitive nets (as I recall) and then analyzes the pcb for 
connectivity, assigning nets as it goes, until all nets have either 
been assigned or have been found to be in conflict.

The component pads can get their nets, again, in two ways: by 
individual edits or by load from schematic. The latter is highly 
recommended, ordinarily component pad nets should be left alone and 
all such changes made in the schematic. That way the net assignments 
won't disappear next time a netlist is loaded from the schematic.

 
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