Linden wrote: > Greetings All, > > Can anyone direct me to information on the relationship between copper > area and thermal impedance for SMD devices? > > I have a D2PAK MOSFET that has a Thermal impedance of 40K/W junction to > ambient when mounted with a minimum of copper on the mounting tab.. > I'd like to reduce this figure by adding a copper area (polygon or fill) > to the mounting tab. > The problem is I don't have a feel for how much copper is needed for a > particular reduction in thermal impedance.
Adding to what was said, as rule of thumb, dissipating more than 1W into the pcb becomes non-trivial. I've seen approaches where a multilayer was made with milled out channels where water is circulating. This way they dissipate tens of watts, but the technology may not be that trivial either and it could even be patented. Rene -- Ing.Buero R.Tschaggelar - http://www.ibrtses.com & commercial newsgroups - http://www.talkto.net ____________________________________________________________ You are subscribed to the PEDA discussion forum To Post messages: mailto:[email protected] Unsubscribe and Other Options: http://techservinc.com/mailman/listinfo/peda_techservinc.com Browse or Search Old Archives (2001-2004): http://www.mail-archive.com/[email protected] Browse or Search Current Archives (2004-Current): http://www.mail-archive.com/[email protected]
