Just a couple thoughts: What is the clock frequency and, more importantly, what is the rise or fall time? How long is the trace run? This will have to be controlled impedance if the length of the line is significant compared to how far the signal will propagate during the rise or fall time. (Use 167 ps/inch for a rough propagations speed on the board.)
How many things get clocked along the line? If there is only one then series termination at the source works well. If there are multiple things to be clocked along the line, then parallel termination at the end is in order. If radiated emissions are the problem (i.e. to pass FCC) then the best choice is to bury the signals stripline fashion, or at least keep their height above their reference plane small. Close proximity to a plane constrains the stray field lines. Burying between well-stitched planes is even better. Choose parts such that the slowest acceptable rise and fall times are used. This will limit harmonic content. A clock typically has significant harmonics up to hundreds of times the clock rate. Make sure there are no plane fingers or stubs that approach 1/4 wavelength for any of these harmonics, as the harmonics can cause these to resonate. Never split a plane under or near where the high speed trace runs. This breaks the high speed return path and causes both emissions and reflections. Hope this helps, Jeff Condit ----- Original Message ----- From: "Jon Elson" <[EMAIL PROTECTED]> To: "Protel EDA Discussion List" <[email protected]> Sent: Wednesday, January 23, 2008 11:11 AM Subject: Re: [PEDA] Advice needed... > > > David Cary wrote: > >>Dear Tom Robinson, >> >>... >> >> >>>Any tips on ways to route a clock signal on a multilayer board. >>> >>> >>... >> >> >>>to minimize radiated emissions. >>> >>> >> >>Jon Elson gives the most important tips. >>I have been collecting similar tips at the "Avoiding Noise" web page. >> >>However, Atmel's "EMC Design Considerations" paper seems to contradict >>the "use power/ground as outer shields" idea: >>"When... four or more layers are used ... one plane is used as a >>ground plane... one layer as a power plane ... These two planes should >>then be placed next to each other in the middle of the board, to >>reduce power supply impedance and loop area. It is not a good idea to >>place the power and ground planes as the outer layers to act as >>shields. It does not work as intended, as high currents are running in >>the ground plane." >> >> > Yes, this is one of those tradeoffs. I always place the power and > ground together > for the lowest impedance of the planes, and have not used the > buried/stripline traces > for EMI supression. It depends on how much each of these conditions is > a problem that > MUST be solved. It may be required in some cases to trade off a little > power plane > noise to satify an EMI requirement. You can also add a shield plane, > either over the whole > board, or just as a local shield that covers the noisy trace, with lots > of "stitch" vias to > tie it to the main ground plane. > > There is no ONE answer to this, it totally depends on the specific > requirements. > > Jon > > > > ____________________________________________________________ > You are subscribed to the PEDA discussion forum > > To Post messages: > mailto:[email protected] > > Unsubscribe and Other Options: > http://techservinc.com/mailman/listinfo/peda_techservinc.com > > Browse or Search Old Archives (2001-2004): > http://www.mail-archive.com/[EMAIL PROTECTED] > > Browse or Search Current Archives (2004-Current): > http://www.mail-archive.com/[email protected] > > > > -- > No virus found in this incoming message. > Checked by AVG. > Version: 7.5.516 / Virus Database: 269.19.10/1241 - Release Date: > 1/24/2008 9:58 AM > > ____________________________________________________________ You are subscribed to the PEDA discussion forum To Post messages: mailto:[email protected] Unsubscribe and Other Options: http://techservinc.com/mailman/listinfo/peda_techservinc.com Browse or Search Old Archives (2001-2004): http://www.mail-archive.com/[EMAIL PROTECTED] Browse or Search Current Archives (2004-Current): http://www.mail-archive.com/[email protected]
