Dear ports@ readers,this is a proposal for a new port: OpenSTA, the Parallax Static Timing Analyzer.
DESCR =====
OpenSTA is a gate level static timing verifier. As a stand-alone executable it can be used to verify the timing of a design using standard file formats: - Verilog netlist - Liberty library - SDC timing constraints - SDF delay annotation - SPEF parasitics OpenSTA uses a TCL command interpreter to read the design, specify timing constraints and print timing reports.
I knew this project since a couple of years and its porting was in my TODO list; but recently I noticed that the internal Qflow tool for static timing analysis is partially broken (already reported upstream, see [1]), so I decided to treat it as a Qflow dependency.
Please note that it needs cudd (see [2], port is already ok sthen).To compile it, I only patched a file in order to change reinterpret_cast to static_cast.
I also added some documentation with the post-install target (those files are in the upstream tarball, but it seems there is no way to install them through their Makefile).
My main concern with the port is related to the license; although it is clear that the software is released under the GPLv3, as confirmed by all source code file headers, I'm puzzled; the README.md ends as follows:
## License Copyright (c) 2019, Parallax Software, Inc. All rights reserved. No part of this document may be copied, transmitted or disclosed in any form or fashion without the express written consent of Parallax Software, Inc.
What do you think? Taking MAINTAINER, port's tarball attached. [1] http://opencircuitdesign.com/pipermail/eda-dev/2019-March/000127.html [2] https://marc.info/?l=openbsd-ports&m=155319441906710&w=2 -- Alessandro DE LAURENZIS [mailto:jus...@atlantide.t28.net] Web: http://www.atlantide.t28.net LinkedIn: https://www.linkedin.com/in/delaurenzis/
opensta.tar.gz
Description: application/gzip
