On Tue, Jan 20, 2009 at 10:03 PM, Paul Rubin <"http://phr.cx"@nospam.invalid> wrote: > "Rhodri James" <rho...@wildebst.demon.co.uk> writes: >> You asked a question about CPUs with atomic update, strongly implying >> there were none. All I did was supply a counter-example, > > Well, more specifically, atomic update without locking, but I counted > the LOCK prefix as locking while other people didn't, and that caused > some confusion. Of course I'm aware of the LOCK prefix but it slows > down the instruction enormously compared with a non-locked instruction.
I'm curious about that. I've been looking around for timing information on the lock signal, but am having some trouble finding them. Intuitively, given that the processor is much faster than the bus, and you are just waiting for processor to complete an addition or comparison before put the new memory value on the bus, it seems like there should be very little additional bus contention vs a normal add instruction. -- http://mail.python.org/mailman/listinfo/python-list
