Philippe Mathieu-Daudé <phi...@redhat.com> 于2019年10月8日周二 下午10:32写道：
> The SiI3112A SATA controller is a PCI device, it will be reset
> when the PCI bus it stands on is reset.
>
> Convert its reset handler into a proper Device reset method.
>
> Signed-off-by: Philippe Mathieu-Daudé <phi...@redhat.com>
>
Reviewed-by: Li Qiang <liq...@gmail.com>
> ---
> hw/ide/sii3112.c | 7 +++----
> 1 file changed, 3 insertions(+), 4 deletions(-)
>
> diff --git a/hw/ide/sii3112.c b/hw/ide/sii3112.c
> index 2181260531..06605d7af2 100644
> --- a/hw/ide/sii3112.c
> +++ b/hw/ide/sii3112.c
> @@ -15,7 +15,6 @@
> #include "qemu/osdep.h"
> #include "hw/ide/pci.h"
> #include "qemu/module.h"
> -#include "sysemu/reset.h"
> #include "trace.h"
>
> #define TYPE_SII3112_PCI "sii3112"
> @@ -237,9 +236,9 @@ static void sii3112_set_irq(void *opaque, int channel,
> int level)
> sii3112_update_irq(s);
> }
>
> -static void sii3112_reset(void *opaque)
> +static void sii3112_reset(DeviceState *dev)
> {
> - SiI3112PCIState *s = opaque;
> + SiI3112PCIState *s = SII3112_PCI(dev);
> int i;
>
> for (i = 0; i < 2; i++) {
> @@ -290,7 +289,6 @@ static void sii3112_pci_realize(PCIDevice *dev, Error
> **errp)
> s->bmdma[i].bus = &s->bus[i];
> ide_register_restart_cb(&s->bus[i]);
> }
> - qemu_register_reset(sii3112_reset, s);
> }
>
> static void sii3112_pci_class_init(ObjectClass *klass, void *data)
> @@ -303,6 +301,7 @@ static void sii3112_pci_class_init(ObjectClass *klass,
> void *data)
> pd->class_id = PCI_CLASS_STORAGE_RAID;
> pd->revision = 1;
> pd->realize = sii3112_pci_realize;
> + dc->reset = sii3112_reset;
> dc->desc = "SiI3112A SATA controller";
> set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
> }
> --
> 2.21.0
>
>
>
