From: Lucjan Bryndza <lbryndza....@icloud.com>
The current implementation of timers does not work properly
even in basic functionality. A counter configured to report
an interrupt every 10ms reports the first interrupts after a
few seconds. There are also no properly implemented count up an
count down modes. This commit fixes bugs with interrupt
reporting and implements the basic modes of the counter's
time-base block.
Improve clock configuration
Signed-off-by: Lucjan Bryndza <lbryndza....@icloud.com>
---
hw/arm/stm32f405_soc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/stm32f405_soc.c b/hw/arm/stm32f405_soc.c
index a65bbe298d..17d6b2ec4a 100644
--- a/hw/arm/stm32f405_soc.c
+++ b/hw/arm/stm32f405_soc.c
@@ -183,7 +183,7 @@ static void stm32f405_soc_realize(DeviceState *dev_soc,
Error **errp)
/* Timer 2 to 5 */
for (i = 0; i < STM_NUM_TIMERS; i++) {
dev = DEVICE(&(s->timer[i]));
- qdev_prop_set_uint64(dev, "clock-frequency", 1000000000);
+ qdev_prop_set_uint64(dev, "clock-frequency", 48000000);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->timer[i]), errp)) {
return;
}
--
2.38.5
